VIA FILLING in Kicad

[kaustubhk]

How to do via filling or tented via in kicad?

[eelik]

There’s no standard way to do that in gerbers. You have to communicate with the board manufacturer. Tenting often means applying extra mask on the via. Filling usually means a special technology, filling with some conductive or non-conductive material, and is usually used for vias in pads. Filling is expensive. You have to discuss this with the manufacturer anyway, so you can also ask what kind of information they want.

[paulvdh]

First, “tented via’s” are supported by KiCad directly. It is just applying the solder mask over the via’s. There is an option for this while generating gerbers, and you can inspect the end result in the Gerber files.

This is not my expertise, but I think “filled via’s” are made with some non-conductive material such as epoxy, and the goal is to prevent solder paste being wicked into via’s when such via’s are inside of pads.

I’m guessing that what you mean by “tended via’s” are called “capped via’s”. The result is to put a conductive layer over via’s in pads. I’m not sure when or where this is done. I assume it’s for small pitch BGA’s with via’s in the pads, and without the capping there is not enough area to solder the pads reliably.

@eelik

There’s no standard way to do that in gerbers.

I have also been parroting this for years…
Today however I’ve been browsing a bit though the latest Gerber specification, and it’s all there. Things like:

• Via Fill (A layer called “Viafill”)
• V-Grooves. (A layer called “Vcut” (Top and/or bottom) and also “Vcutmap”. I think this last one is vor notes about V-grooving.)
• Masks for local application of God / Silver / Carbon / …

This thread has a link to that file:

Guidance for Gerber Viewer in 5.99

Yes, It is both a dumb image and I was able to Re-create the PCB from it. If you do: Gerbview / File / Export to Pcbnew and choose the right layers (there was no layer info in that old project), then KiCad is smart enough to make copper tracks from the straight line segments on the copper layers. KiCad also has the built in functionality that if a footprint is placed on a piece of track that does not belong to any net, then it assigns the net from the pins of the footprint. So you do a bit of…

The document is 205 pages, and I have just started reading some of it, the modern Gerber standard is much more comprehensive then people seem to realize.

So now there are a few task left:

• Make an issue on Gitlab to have these features implemented in KiCad (I have not checked yet if such a request already exists).
• Make the world aware that these features do exist.
• Nag PCB manufacturers as long as needed so they use updated software that also actually implements these features.