A friend of mine sent me a project of his. Interstingly, as he uses Altium at work, his first method to create a mounting hole in KiCad was to use a VIA. I’m wondering what others think about this concept.
What I realize, as I type this, is that I have no idea how the gerbers are going to end up. This individual VIA can not be un-tented with the Plot Tool. However, a solder mask circle has been added to the center of the VIA with a desired line thickness to create a ground ring for mounting (purple ring).
In KiCad, you should use Footprints (or Footprint pads) for mounting holes, there are several already build-in for various screw sizes. Version 7.0 is scheduled to have more via settings, which might make them more useful for creating mounting holes and other stuff, but in v6 it’s similar to v5.
That said, creating a huge via and putting a solder mask circle over it will probably result in okay Gerber files. It’s just more annoying to create and adjust than a footprint pad.
Beware of tolerances. IPC-class 600 allows for quite big negative tolerances on via hole diameters. (Class 1 is -50% if I remember well.) Fabricators follow this, and havequite big negative tolerances in via; some put it on their website, for example, Tolerances on Printed Circuit Boards - Eurocircuits. Quite logical, if a via hole is indeed a via hole the diameter is not terribly important.
The Gerber tells it is a via, so it tells you are OK with the high tolerance, and whatever they do with vias.
In general, no fab I have used has treated vias and PTHs differently in terms of the Gerber data. If they apply different tolerances to vias vs. PTHs, they tell them apart based on the drill size (big holes vs. small holes), not based on some kind of attributes in the files. In Altium, both free vias and footprints with PTH pads can have custom pad stacks, so there is not a lot of benefit to using one or the other (except that you would typically want to use a library of footprints if you use standard sizes of mounting hardware frequently).
@Sprig
Your remark about the via diameter is true. But the IPC spec is what it is. If you require a min via diameter you must either specify a higher IPC class, or a big via diameter to begin with so that even taking into account the tolerances you are still OK, I guess.
@craftyjohn
You cannot really tell via’s and component holes apart based on diameter alone. There are very small component holes, 0.3 I believe, and quite big via holes.
IMHO the fabricator is allowed to use the information in the Gerber file, and it makes no sense to confuse him by telling a hole is a via when it is not.
AFAIK there isn’t anything in the gerbers that state what the different size holes are for.
I just checked a small board that I made that has NPTH mounting holes, a PTH mounting hole, lots of PTH holes for component pins, and several PTH vias. (This board doesn’t have any NPTH index holes for positioning pegs on a component, common on some connectors.) I looked through the gerber (and excelon) files in a text editor and of the PTH holes I couldn’t determine the purpose of any of them, other than the purpose of having a hole that is plated from top to bottom.
If a gerber viewer/editor can determine a via from a hole for a component pin from a plated mounting hole, it is only doing by guess work. The guesses might be quite clever looking at other board features, or a dumb size range guess. So, a designer using a via and putting solder mask over it would at the gerber level look identical to using a PTH mounting hole footprint, or built-in mounting hole element (something KiCad doesn’t have).
There are aperture attributes in Gerber to define the function of a drill tool. So you must look around the aperture definition, not around the holes themselves. KiCad outputs these attributes, AFAIK.
Were it KiCad Gerbers you looked at?
Yes, they were KiCad Gerbers… Although old Gerbers. (From back in KiCad’s BZR days.) But still valid Gerbers. And the drill files were Excelon drill files, not Gerber drill files (just to be pedantic about it)…
For reference, here is that drill file for the PTH holes. Except for looking at the drill size, there is no indication of function of these holes.
Ok. I just generated an Excelon drill file for another sample board using KiCad v6.0.1 and found those aperture attributes. They seem to be commented out to not confuse older equipment/software that don’t support them.
If you generate the drill files in Gerber format, you will see the same attributes, also commented out. In the top & bottom copper layer the file will of course say nothing about the drill holes, as they are not there, but they will indicated which pads are via pads, which gives the same information. All commented out.
