Using https://github.com/KiCad/kicad-templates to make an UNO shield, I fail to see the humor in having the shield’s ratsnest connect pins A0 and A1 on P2 to their additional breakouts on P3. I see absolutely no reason to clutter the shield with those traces when the UNO board itself already has them connected to each other. Yes, I’m sure there is some reason of convenience for the net to be in the shield’s list, but I’m only asking here how one adds to/subtracts from that ratsnest properly.
To further help me understand how to create and modify the ratsnest, I’d appreciate further help as follows:
Before I knew about the existence of such a thing as the ratsnest, I laid out a footprint (HX711 module.kicad_mod (6.4 KB)) for the HX711 module that comes in two (or even three now?) different pin spacings not using ratsnesting. I bought several of those modules of the disparate pin spacings and want a single footprint to handle them all. To clarify, the two styles of HX711 module differ significantly in their distance between two parallel rows of pins, measured perpendicularly to the rows. Therefore, the footprint has to duplicate one of the pin rows. I’m thinking to edit my original footprint design to employ ratsnest lines to that footprint/symbol/schematic/whatever to suggest an appearance that I know something about doing it right. I’m wondering how should I accomplish that? From what I’m gleaning on the forum, Eeschema is the tool for ratsnesting, but do you think I really have to make a .sch file for the module just so I can get this done?
You don’t edit ratsnest. Ratsnest is just a visual representation of intented connections between pads when they are not yet connected with copper in the layout design. You don’t use ratsnest when you design footprints. You define connections between pins or pads in the schematic by drawing wires between symbol pins. All pins connected directly together with wire(s) form a net. Ratsnest in the pcb layout program reflect those nets. When you draw connections with copper the ratsnest lines disappear.
Can you provide screenshot(s) of what you have now and which could show the problem? Because of ambiguous terminology it’s difficult to understand what you mean.
Note in that footprint I only figured to have the GND and E- pins to have traces on the back side so I could have a more solid GND backplane for maximum RFI shielding. ( I live practically underneath about 10 very high power commercial broadcasting and weather radar RFI sources which I am hoping to get immunity from.)
Your point here is far to vague for me to get it. Let me say this about the link - I’m sure it makes ever so perfect sense once a person understands the material, the concepts, the flow, etc. HOWEVER, it is not helping me where I am. I need help from someone who understands where I am from a knowledge standpoint and so can speak my language, so to speak.
This statement begins to address something substantive. Are you saying that it only has two pins - GND and 2 - that will connect to a symbol that has those same two pins? I didn’t want the back side to have solder pads for the other pins so no RFI could reach them. Maybe that is an illegal situation to hope for?
Or are you actually writing accurately - it cannot be connected to ANYTHING? If it can’t be connected to ANYTHING as you say, is it because I didn’t make a symbol first?
We can delay discussion of ratsnest until later, if you want.
Can I suggest that you read through one of the intro tutorials on KiCad; I think you are trying to run before you can walk. Even if you have lots of experience with other EDA software, you might need to learn how KiCad does things. You need to understand that components are connected by labels - so two pins labelled identically will be connected; they don’t necessarily need a line drawn between them to be connected. Have a think about how this might explain your first ‘sense of humour’ failure moment.
There are quite a few other issues with your schematic. Come back after a bit of background reading - i think it will be tricky to navigate you through to a successful outcome without a bit of background reading.
Not exactly, Kenneth. A symbol is not conneted to a footprint. A symbol represents a component that is to be soldered onto footprint. There must be a correrlation between the pins of the component and the pads of the footprint. In Kicad this correlation is done by means of the pad number.
Even if the schematic could be right (I cannot verify if it is right or wrong), there will not be a link of the hx711 footprint with any other footprint in the layout.
But there is a hx711 symbol in your schematic, made by you or not.
I agree. It is difficult to guess where you are with the information you have given. As Eeli and John have pointed out you should manage some Kicad terms in order we can speak the same language and help you.
It must also be pointed out that most or all of the terminology mentioned in this thread is common to the industry, not KiCad specific. You should learn it anyways if you want to design pcb boards.
Assuming you read my tutorial you should at least have specific questions regarding it. It might help to ask about the details you do not understand. (somebody else could then try to use different words for the section that is a mystery to you)
Other helpful tutorials are also found in the FAQ.
It might be a good idea to work through the how to make a symbol and how to make a footprint tutorials even if this means making a symbol/footprint for a part that you do not need right now. This should give you an idea of how everything can be done.
You are very correct. My apologies. I’m the one who made it. And let me right now dispel your concerns about any schematic errors that are being implied - if I were you, my direct connections of the AD8244 unity gain buffer outputs would be a huge distraction and cause for suspicion of the designer’s experience level, so let’s get that elephant addressed: the AD8244 datasheet page 18 allows for such direct connections " For less power sensitive applications…". I’ve reconsidered and have decided to throw in a resistor from each paralleled buffer output minus one, so two of three or one of two will get a resistor when I parallel them.
But my following question here in this post is what I want to focus on right now:
When I try to reconcile the two quotes above, I am thrown into the mode of “cannot proceed beyond this point with understanding until these unknowns are addressed” in my mind.
Q: WHEN is the mentioned “connection” accomplished? For example, is it when the netlist is manually filled in and then saved? Or is it done manually/automatically before/after then?
Q: Which .pro needs to be active for said “connection” to be made/created/built?
Q: Is there more than one place/tool from which this “connection” can be made?
Q: How can I EDIT or view someone else’s or my own such “connection”?
Q: My footprint and symbol for my HX711 leaves non-PTH pins unnumbered. Will this prevent success of a “connection”?
The “connection” is made when the schematic is imported into pcb_nw (either via the deprecated way of using the netlist or via the update pcb from schematic tool)
Or more precisely the pin/pad numbers are used by kicad to determine which wires connected to which symbol pin correspond to which pads of the footprint.
It does not matter which project is open while designing a footprint or symbol (*). Just assign the pin numbers such that the symbol fits its intended footprint and vice versa.
To import the schematic information into pcb_new you will have to open the pcb file which means you automatically have the project open.
Not sure what you mean with these two questions. I guess you interpreted too much into the word connection.
To reiterate: Symbols and footprints are completely separate entities in kicad. You can “connect” any symbol to any footprint provided all pins used in the symbol appear in the footprint. (Really only pin numbers matter for creating the connectivity information of the pcb.)
The connection is made by two sets of informations. The footprint field determines which footprint to use while the pin and pad numbers determine which pin represents which pad.
Non plated through holes do not need a pad number as they have no way of creating an electrical connection.
Ratsnest only describes the helper lines that show which pads have not yet been connected with either a trace or a zone. Meaning a finished board has no ratsnest lines left.
The connectivity information generated by pcb_new on schematic information import stays valid after that and is even used for the DRC. Meaning it does not really make sense to use the term ratsnest for describing connectivity information.
*) The only reason the project could matter is if you place your symbol or footprint into a project local library.
Yes, I know. I’m just saying that this “connected” you mention here is likely the “connection” talked about above, and if so, I would have been helped immensely to have seen that post of yours while I searched for mentions of “ratsnest”.
Q: Please state clearly whether a ratsnest line is or is not a representation of this “connection” I’m mentioning that I’m trying to view/edit/create/delete in various places. I can’t understand why you are having such a hard time being clear about this!
Q: Let’s say I am in Eeschema with my project and I want to tweak said connection[s] between the symbol and footprint that I created of the HX711 placed in the schematic and am trouble knowing which tool or menu selection to click on first to get there from here. Can you help? And is that action the same for the Arduino UNO shield symbol and footprint that I downloaded from https://github.com/KiCad/kicad-templates/tree/master/Arduino_Uno_R3? (Please note the .pro file with this site. Will that make a difference in my menu navigation both from within my own .pro and/or running that .pro in KiCad?)
pad and pin numbers are changed with the pin or pad properties dialog. (right click context menu of the pin or pad -> properties. Or hotkey e while your mouse hovers above the pad or pin. Use the symbol or footprint editors for this task.)
The footprint assignment can be done in multiple ways. Either assign the footprint already in the library, or do this task sometime before switching to the pcb side of your design task but after placing the symbol into the schematic. (There is also an experimental option where you select the footprint while placing the symbol in eeschema.)
Both workflows make sense for different components. I typically assign the footprint for simple devices like resistors and connectors at the end of the schematic design process while i have the footprint for more complex devices already pre assigned in the specialized symbol for this part. You might prefer either of these work-flows or like me a mixture of them. There is no wrong or right here. (The good news: KiCad is flexible and allows for different workflows. The bad news: KiCad is flexible and expects the user to decide which workflow they like for their current task.)
My workflow allows having a single resistor symbol for all resistors instead of needing a resistor symbol for at least every used resistor size. While it still reduces the chance of doing something wrong with more complex devices. (Assigning footprints at the end is like any user interaction a place where an error can occur. Having trusted symbols with pre assigned footprints reduces this risk.)
Resolved once I recognized that when I was looking at “Label Properties” it was actually “Net Label Properties”. I didn’t realize that KiCad uses no other Labels besides Net Labels. Sorry for the confusion, but thank you very, very much!
P.S. - I am hoping someone gets the hint here since KiCad DOES use other types of labels!
I have not worked with the “New” method in KiCad V5 much yet, but it seems this method can be improved upon.
It’s not easy to see much of the opposite / companion layer if Zone filling is on, unless you use a high low opacity of the layer you’re drawing on, and using low opacity for the layer you’re drawing on gives low contrast for the things you want to see.
Also the Top Silkscreen, gets hidden to a large degree.
I think it might work much better if the current layer is always drawn 100% opaque for high contrast, and the other layers are drawn over it in various levels of opacity.
For now I assume this (relatively new) method is “not finished”
On the other hand, being able to see overlap in traces with the opacity controll is a big bonus.
Maybe I have to practice more and experiment with the “High Contrast” mode
