Yes. It doesn’t cost any extra, it is very little effort, and it can only help. Both with high-frequency signal integrity, and with making sure all chips have a solid ground. There is nothing worse than having to debug a chip acting weird because its ground bounces up to where you lose Vil margins. (To quote Opus the penguin: Yes there are things that are worse, like being eaten by a walrus.)
While you are at it: Also make all Vcc traces wider, or connect them to hand-made planes. And put your decoupling caps really close to the chips. On my most recent 2-layer board, I made all ground and power traces at least 20 mil wide, and for the main arteries I try to find room for 40 mil (1mm) traces.
Where should the ground vias go? Wherever there is a solid ground (or Vcc) trace nearby. See above, make those traces wider, and vias are easy to place.
One thing that annoys me a little about KiCad: Sometimes, you end up with an “island” on a layer that could be ground filled, but doesn’t have a ground trace or pin nearby. To get it filled, you need to manually add a via. Sometimes the only place that extra via can go is in the middle of nowhere, connecting to another fill. No problem, I put the via there. But then the next DRC check complains that the via isn’t connected to anything (duh, the DRC is right!). Supposedly there is a way to mark a via as “exempt from connection check”, but I haven’t found it. So for now I just manually add a ground trace.