Thermal reliefs disappear after plotting gerbers

DRC reports no unconnected errors, but there are other errors such as:

  • Board outline does not form a closed polygon
  • Pad too close to pad
  • Drilled holes too close together
  • Track too close to pad
  • Courtyards overlap

No nets, no ratsnest. The footprints were laid in manually. The designer worked from my LTspice schematic. There is no KiCad schematic file.

Zone priorities are all set to 0.

The view menu of a PCB_New file shows a green checkmark as the ratsnest icon. In my pcb file the ratsnest icon is a group of crossed over lines.

Here are the Pad Properties:

I can’t find the footprint properties.

Correct, this is the cause of the zone fill not connecting. Is this another attempt to use Pcbnew without a schematic?

The board was designed without a KiCad schematic, and has been fabricated without any problems. At least, until now. The board was originally designed in 2017 using a much older version of KiCad.

Thanks, everyone, for the guidance. Evidently the thermal spokes disappear when I hit “B” because there is no net assigned to the ground planes. Now can someone please explain how to assign a net to my ground planes?

Something is fishy here.
First, I can’t fathom someone would create a pcb of such non-trivial complexity without creating a schematic first, just by plopping down footprints.
Second net information was obviously there at some point because zones have spokes to some pads and not others.

Maybe this board is back imported from gerbers? That’s one way it would loose net information.

To answer your question: you can’t create nets in pcbnew, at least not with GUI.
I would suggest you get original files, including schematic and continue from there. If you can’t get your hands on that it would be more efficient to start from scratch (and possibly use this file as a guide to place footprints in your new project, that will save some time).

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All I can tell you is that my board designer was very much old-school. That’s the way he’s always done it, and that’s the way he approached using KiCad. Not by the book, but it worked. We made a run of 25 boards without a squawk from the fab house.

I’m sure he didn’t back import gerbers, because he designed the board from scratch in KiCad. I’m guessing that he did not refill zones, ever. If I plot gerbers, the thermal spokes show up on the front copper so long as I use the “plot without refilling zones” option. Could this be how he did it? If so, what are the implications? Anyone?

Well I don’t know how this worked in very old version of KiCad but in v5 you can’t create nets in pcbnew gui (only through scripting) and zones will not connect to pads if they are not the same net. So if you have to make some modifications to the board you are out of luck (at least with relatively new KiCad versions).

However if you don’t have to modify the board and you know that it definitely works then you can just plot gerbers without refilling zones, it will be fine.

I found this in search:

Rerouter
Sep '18

To have Zone filling working, you would at least need to write a Netlist for the areas you want Zones, e.g. “GND”

Other than that, turn off the drc with the red bug button on the top of the left side toolbar, and you should be able to throw down footprints and traces however you please.
PCB_Wiz

Does this method no longer work for v5?

20 characters needed…

But, a circuit schematic HAS been captured. This design is NOT vapor-ware that exists only between the ears of some individual. Looking at your screen shot in Post #15, I see four, 9-pin sockets (dual triodes?), a bunch of passives, and a separated section that might be a power supply. OK, this thing is a bit more complicated than a K2-w or a PAS-3, but since component values and circuit topology are already known, I bet I could knock out a workable KiCAD schematic with no more than a half day’s effort.

(Getting it neatly arranged on format paper, adding the notes and revision history, will double or triple that time. If nobody comes looking for that additional information in the next six months, then YOU will likely be looking for it within a year, but at this moment . . . no, it’s not necessary to make board layout much easier.)

Seriously . . . . and I make this comment as a point of information and education, NOT as an insult . . . the time you have put into fighting the problems which arise from NOT having a workable KiCAD schematic is comparable to the time it would take to draft a schematic.

Well, if I was a KiCAD designer in the San Jose area, I would only consider the job if you paid a premium rate for the time it took me to draft a schematic, because this sounds like the sort of poorly administered project that is typically plagued by half-done prerequisites, inadequately specified requirements, and spec creep.

Dale

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Thanks for the offer, and for the well-deserved criticism. I can agree that it would have been much better to start with a schematic. Now I know.

At some point I would like to do as you suggest, but at this point I’m just looking to make a few revisions for the next board run. So I’m asking again, all you KiCad masters out there, if there is a workaround for this problem. As Rerouter suggested last year, can a Netlist be written just for the zone areas, i.e., as GND?

If the nets are gone at the moment, then there is no easy way to recover them. The hard way is to open the file, add the net names and then use them in pcbnew to rename each pad’s net.

The board had nets at some point in the past. I can say this with certainty because the zones only connect to the same nets on the pads. So if you had thermal reliefs, you had nets.

I would begin by going back to the file from the version that was last produced. Open that board file in pcbnew and go to “Inspect->List Nets” to view the existing nets for that board. If there are no nets in the original board, you may have found a translation bug that we need to fix. You can contact my via DM on this forum or in the links from my profile.

A short-term solution to help you get this board out the door in a timely fashion might be the WireIt plugin. I haven’t personally used it, but it claims to be able to make, modify, and remove nets at the PCBNew level. As always, make a backup before trying something like this… :wink:

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Just a heads up for those interested in this thread. This is a regression from 4.0.7 in how we handled net-less zones. We’re tracking the bug here https://bugs.launchpad.net/kicad/+bug/1841693

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I am moving myself from old Protel to KiCad. I have not done any PCB in KiCad yet. I supposed that I will do in KiCad new designs and if I had to do only modifications to old designs I will do that in my old tool. But first task I got into had a serious modification of about 20% of PCB and I decided to move with it to KiCad among others to get some skill in using KiCad. I had to break that work because of other tasks to be done.
In my opinion if you draw a schematic then designing the PCB to be a copy of that old one is not a lot of work provided you have the old one opened at second monitor or can may be a placement info imported to PcbNew as a graphic (to be deleted later). Placing elements is (in my opinion) 80% of work with PCB, and you have it done - you only need to copy it. I would certainly did it that way being at your place. Have in mind that may be in a year or two you will have to do the next modifications to that PCB.
As I follow this forum since more than a year I’m sure that people here will certainly help you with that work and in most cases you will get the answer to your questions very fast.

Added later:
As experiment do the simple PCB with only few elements starting from schematic.

Thanks for this. I will look into it. :grinning:

Thanks for the guidance. I will no doubt have to do this at some point. In the meantime I’m looking for a simple workaround to make just a few changes to the zone traces.

Update from the bugtracker: It seems the board used negative clearances for zones and pads to trick kicad into connecting stuff it should have never connected. (It used a bug of kicad version 4. A case of https://xkcd.com/1172/)


@audioeng either go back to v4, use wirelt (linked somewhere above) or some similar tool to create a netlist or create a proper schematic for the board to go forward. (From these going back to v4 might be the least painful. But be aware that you will fly blind as DRC will not be able to help without a netlist.)

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Thanks, everyone, for the many suggestions and insights. Looks like I let the bug out of the jar. :woozy_face:

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