Pin and gate swapping is not a high priority for me, but I once made a 2-unit symbol (2-deck rotary switch) and It turned into a half tutorial: Footprint for a 2-deck rotary switch
In this thread:
I mentioned my start of a project with an ST Spin. It’s an STM32, but with built in extra hardware that is commonly used in BLDC motor controllers. It has:
- STM32 uC.
- SMPS.
- 3x Low side gate driver circuit.
- 3x High side gate driver circuit.
- Several Opamps for current sense amplification.
- Maybe more (The project never got very far for various reasons).
So it has at least 5 different graphics, and some of the units have two or 3 instances. Designing such a symbol (and maintenance) is a chore to do in KiCad. One thing I particularly do not like is that when “All units are Interchangeable” is checked, the graphics are the same, but you still manually have to get the pin locations for the other unit. For me, same graphics implies same pin locations.
When “All units are Interchangeable” is not checked, I guess you have to copy / paste graphics between compatible units. This is error prone and bad for maintenance. It also blocks later additions such as gate swapping.
In my opinion, the internal way of designing schematic symbols has to be changed before pin and gate swapping can be implemented. properly. KiCad has to know which gates can be swapped, and that has to be defined inside the (multi unit) symbols.
For pin swapping (for example the two inputs of a NAND gate), defining which pins can be swapped (you can’t swap the inputs of an opamp!) also has to be done in the schematic symbol. Pin swapping for microcontrollers would be very difficult to completely define inside KiCad. When a pin is used as generic I/O, it probably can be swapped with any other I/O pin, but when it’s used as a special function (Uart, Timer, SPI, I2C etc) then often you have 2 or 3 specific locations to which a peripheral can be mapped. I guess that attempting to put all of this in KiCad is not realistic. Pin swapping on FPGA’s is also common. I have no experience with FPGA’s and whether they have special requirements here. (I guess pin swapping can influence timing).
A “true” implementation of pin and gate swapping also requires back-annotation. That is, you discover an convoluted way an IC is routed, and to straiten that out, you want to swap some pins or gates, and you do that in the PCB editor, and then port that information back to the schematic. Even back in the early '90-ies this was implemented. Back annotation for gate swapping is relatively easy. It only requires a change in the RefDes in the schematic. For pin swapping it’s more complicated. Graphical wiring has to be changed to get the schematic in sync again. And the only viable way I see to do that is to do this manually. It would be very nice if KiCad could show ratsnest lines in the schematic to make the changes that have to be made visible. This is also a great feature for reverse-engineering PCB’s. I mentioned this on Gitlab (probably a few times) but received a bit of push back. I think it was deemed too much work for too little benefit.
In my view, all these changes have to be implemented in the schematic symbol definiton (and thus symbol editor) before a “real” implementation of pin & gate swapping can be implemented. And this is probably why this issue has been sitting on gitlab for so long.