I cannot seem to find a way to run the debug for the netlist in the schematic one by one as I could do in Pcad. It is just a jumble of compound errors, most completely bogus.
So can someone give me a pointer how to switch off certain rules for checking ?
Thanks
Have you tried the options tab on the electrical rules checker? 
Firstly, you should stop trying to use Kicad as if it were some other package (ie. Pcad).
Try to understand the error messages and don’t assume they are “bogus” since that is unlikely. If you don’t understand the message post it here for some help.
The ERC check in kicad is quite basic. It only checks if pins of one type are connected to their correct counter parts. The checking matrix is in the second tab of the ERC dialog.
As the ERC depends on the correct setup of pin types, it is important do understand the options you have in kicad. See: Electrical type of schematic symbol pins (KiCad 4 and KiCad 5)
If you get lots of pin not connected errors for pins that are intentionally left unconnected use the not connected “Flag” (small blue x) to tell ERC that this pin is indeed unconnected on purpose.
Thank you for the reply Rene and Otolen.
Yes I did check and played with the array in the second tab of the checker.
It didnt really do what I needed.
If I switch all error checking off there, i.e. making all green, it still gives me error-3 and error-2 which is completely distracting and no valid for the schematic as there are a lot of intended unconnected pins.
So how do I switch off error-2 and 3 ?
I didnt really get an answer whether I can only use one rule at a time which would be really helpful as there are still errors reported when all switch off. Am I correct to assume that that is not possible and that I will always get the entire smorgasbord of possible errors mixed in with benign warnings?
Alternatively, is there a way to highlight all connected points. In Pcad e.g. I can hover over a line and it will highlight everything connected to that line in the net. That is a much more intuitive way to figure errors for smaller circuits. For large circuits rule checkers are indispensable, I agree.
So does any such feature exist to see all the connected objects when selecting an arbitrary line. ?
Thanks
Highlight net stuff will be added in KiCad version 5 (It is already in nightly)
You can use the matrix to disable specific warnings/errors which should allow you do see a reduced set.
If a schematic is well designed you should not get a lot of warnings and even less errors. (I always aim for 0 errors and 0 warnings)
Well didn’t i tell you how to handle intended unconnected pins? Add the unconnected flag! (blue x in the right toolbar) That way you are sure only intended pins are left unconnected.
For type 3 (connected but not driven) you might want to look into power flags.
I already disabled everything in the ERC options and it still returns Errors 2&3, which are in my schematic’s case bogus. How do you switch those two off also ?
Aah OK so you will add net highlights. That will really be great and what is missing from what I am used to use in Pcad. It is really a powerful tool and I am glad it will be added.
I was looking for the blue X in the ERC options and that is why I kept asking, but you made it clear where it is now thanks.
I prefer in this case with the ERC and how it works to rather use the netlist to check connections. I tried all the exports to the 4 netlist types you provide. When I used to use the old version that gave me so much trouble, it would export to a nice format where it lists each net and which component is connected to it. That format was seemingly dropped in subsequent versions. All the current netlist exports follows the inverse format that lists a component and which nets are connected to it. That old format was very useful to me. Is there any way to export to a file that will give netlists and what is connected to it rather than the inverse as the four options employ ? I understand they are for other cad programs, but it is useful to be able to have nets and what is connected to each net in a file. I cannot find any such discussion in the manual.
[quote=“retnev, post:7, topic:9436”]
. . . I was looking for the blue X in the ERC options and that is why I kept asking, but you made it clear where it is now . . . . [/quote]
The KiCAD User Interface still suffers from cases where a feature doesn’t appear in a menu where many folks expect to find it; or it’s available as an icon but not a menu item; or it’s only available via a shortcut key (perhaps several levels deep on the shortcut menus). It can be frustrating until you uncover the secret, and use the feature enough to memorize how to access it.
Does the atch screenshot illustrate the format you desire? It’s the native KiCAD format, used between EESchema and PCBNew. (I produced this example using a Nightly Build from Feb 2017, but I don’t believe it has changed since the release of Ver4.0.0 or earlier, and will continue unchanged into Ver5.0.0
Dale
dchisholm thank you for the reply, it is appreciated.
Thank you for clarifying, it helps a lot to know what the status is, so I dont bang my head on something for no reason. I will look at the shortcut menu and study it up as you suggest that that is the way to go.
The attached screenshot cannot display here as it seemingly doesnt have the permissions for public read. I get permissions error and a kicad page that I need to contact administrator.
I got around the the inverted netlist format by writing a bash script that converted the netlists available to listing the nets and then all that is connected to it. I can clearly see now if there is an error thanks. It will work for me for majority of schematics.
It was mentioned that the net highlights feature will appear in a version soon. When will the nightlys be expected to become a new version ? I just want to know if I should use a nightly or if it is soon, rather wait for a new version.
Is it possible that you are behind a proxy that blocks the domain of the server used for storing our images?
(It is an amazon aws server)
Do you see other images?
Retnev, this is a user forum. We all are users, like yourself.
So we don’t add anything to Kicad. We leave that credit to the developers
Rene, yes you are right. amazonaws is blocked on the firewall as it was used in a malicious attack about 6 months ago. Was real nasty. amazonaws IP attacking ntp. I generally can load all photos as amazonaws content is vary rare, but it explains why I cant see it.
OK, here is a sampling of some netlist lines from a recent project. This netlist was created in the native KiCAD format, used between EESchema and PCBNew. (I produced this example using a Nightly Build from Feb 2017, but I don’t believe it has changed since the release of Ver4.0.0 or earlier, and will continue unchanged into Ver5.0.0 ) If I correctly understand your request for ". . . a nice format where it lists each net and which component is connected to it . . . " (Post #7, this thread), this format meets your requirement.
(Begin Netlist Sample)
. . . . .
(uri C:\Applications\KiCad\share\kicad\User_Libs\Schem_Libs\Jumpers.lib))
(library (logical Connectors)
(uri C:\Applications\KiCad\share\kicad\User_Libs\Schem_Libs\Connectors.lib)))
(nets
(net (code 1) (name “Net-(C10-Pad1)”)
(node (ref R6) (pin 1))
(node (ref R7) (pin 1))
(node (ref R10) (pin 1))
(node (ref C10) (pin 1)))
(net (code 2) (name +BATT)
(node (ref R1) (pin 1))
(node (ref R6) (pin 2))
(node (ref C4) (pin 1))
(node (ref C5) (pin 1))
(node (ref U3) (pin 7))
(node (ref U2) (pin 2))
(node (ref U4) (pin 8))
(node (ref D6) (pin 2))
(node (ref C11) (pin 2))
(node (ref C9) (pin 2))
(node (ref Q1) (pin 2))
(node (ref Q2) (pin 2))
(node (ref D13) (pin 2))
(node (ref D3) (pin 1))
(node (ref D12) (pin 2))
(node (ref D14) (pin 2))
(node (ref F1) (pin 2)))
(net (code 3) (name “Net-(R1-Pad2)”)
(node (ref R4) (pin 1))
(node (ref R1) (pin 2))
(node (ref R2) (pin 2))
(node (ref U3) (pin 3)))
(net (code 4) (name “Net-(C8-Pad2)”)
(node (ref R3) (pin 2))
(node (ref U3) (pin 2))
. . . . .
(End Netlist Sample)
(I see the Forum software has zapped the leading tabs and spaces, which make the actual netlist more readable in a text editor such as “Notepad++”. If your local machine refuses to display the *.png screen capture I posted earlier, you’ll just have to take my word that the indented formatting makes the netlist easier to interpret.)
Dale
Dale, sure that is exactly what I want but not what I get using the PCBNew Netlist. It is all inverse.
Scroll down the file .net generated for pcbnew.
Ok, I see. I don know why I saw it in the older version but not the newer version a while ago, but it sure is there thanks. I probably saved a different eport instead asall the exports has the same filename and does not distinguish for which platform target the net-file is. That would explain it.
Last question. Is there any way I can use kicad to recreate a schematic from a given netlist it supports.?
I have netlists from several schematics accross several other platforms dating back to mid 90s I want to migrate to Kicad. I know I will have to recreate parts, but just want to know if anyone knows of a recent maybe easy way I dont know of.
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