Another or two generic remarks.
You don’t have net labels. Go through every net and give meaningful labels for them (other than the power nets which already are labeled). When you do that carefully, you are doing another double check where you may notice something. And it’s certainly easier to compare the schematic and the layout later.
You haven’t cared about the ERC. I know how frustratingly difficult it is to give correct pin types for IC’s and I don’t use ERC much myself, but that’s another exercise where you can find some hidden error. When you then do the ERC check and it doesn’t give errors, you can have more confidence in your design. See Electrical type of schematic symbol pins (KiCad 4 and KiCad 5).