[SOLVED] "Broken Ring" pattern in paste layer for footprint generation

+1 … and some chars

I’m not following that - the solder paste area is a long way from the hole ?
What may be an issue is solder mask ink getting into the hole - a NPTH hole avoids that, but if it is the only NPTH hole, that will cost more.
Careful tune of PADSTACK sizes to avoid both solder and mask-ink issues, should find a PTH solution ?

But it isn’t on the footprint that @nali posted. The 3D view up above is @maui’s example. Here is what @nali’s design looks like (front and back) in the 3D viewer:

Though, I suppose a better question to @nali is why his design deviates so much from the originally posted image. Round pads where there should be square, two extra pads, size of the pad around the microphone hole (the OD of your pad is 1.224mm, but the drawing specifies 1.45), pin numbering doesn’t match, etc. Did you upload the right model?

Well, that depends on the manufacturer. More and more board houses now don’t charge extra for NPTH holes.

I don’t know why not having asked them, but I suspect that they expect everyone to have NPTH holes. Thus NPTH holes would already be built into the cost of the board, even if the board design doesn’t use them. For all I know may they have the routing bits and NPTH drill bits all on the same turret and do the routing and NPTH drilling all in one CNC job (probably in the other order, holes then routing…). Similarly, per via pricing seems to have also vanished from the industry.

Oops, yes, I just glanced at maui’s images, and had not spotted the large differences to earlier images…

I used a model from a general DS of SiSonic, not knowing the real user case adopted, @nali redesigned it to his model

The drill should be NPTH with a less drill size

here a second release :wink:


SPU0410LR5H-r2.kicad_mod (3.8 KB)
PS I’m not sure about the pin numbers… in the DS it is not clear if the view is from top or bottom

Ah. He didn’t provide a link to the actual datasheet when he finally mentioned exactly what part he wants to use, and I didn’t bother to go find it.

Ain’t communications fun? :stuck_out_tongue_winking_eye:

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My target was to introduce him to the use of generating footprint in a mechanical environment, plus improve my tools :wink:

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Quite simply my OP was about how to generate the segmented ring, and the image was a Google Images search for such a pattern. I deliberately didn’t attach or link to the specific part because I wanted to find out how the process works rather than hope that somebody just comes up with my footprint (or give the impression that’s what I wanted).

I certainly wasn’t expecting @maui to add it to his demo!

I must admit I hadn’t considered solder migrating down the hole so I’ll probably tweak my footprint a bit. Knowles’ design guide isn’t much help in this respect, about all they offer is

The solder stencil pattern must be optimized for production, and for bottomport SiSonic models must use a broken solder ring such as that shown in the figure below

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