SKiDL: a Python-based schematic design language

It’s still ongoing. I’ve built a few boards with it. You can see more here.

Together with KiPart, SKiDL is definitely my favourite KiCad companion, well done indeed xesscorp :slight_smile:

One killer feature for me (if not already in the works/thinking) would be panelizing of gerbers as a last step of the whole SKiDL workflow/api. I’m currently using a SVG/Inkscape hack to panelize my boards when baking them at home:

$ cat crop_svg.sh
#!/bin/sh

inkscape -g -f `pwd`/kicad-plot-SVG-F.Cu.svg --verb=FitCanvasToDrawing --verb=FileSave --verb=FileClose --verb=FileQuit

Combined with a simple HTML file in dire need for Jinja2/templatization:

$ cat panelize.html
<html><head></head><body>
  <object type="image/svg+xml" data="kicad-plot-SVG-F.Cu.svg"></object>
  <br/>
  <object type="image/svg+xml" data="psone_grafitti-F.Cu.svg"></object>
</body></html>

I have little clue how easily hackable gerbers are to achieve the same goal (panelize), but since the topic has been brought before on kicad forums I thought it might be a nice wish, combined with proper/automated management of mouse bites between boards, it can really be a huge time saver for both users and fabs, IMHO.

I’m glad that KiPart and SKiDL are helping you out!

As for panelizing, that’s an area I haven’t tried to automate. I just use the PCBNEW ‘add board’ feature to combine several PCBs. I have a mousebite component that I place around each board outline when I create them. The component has two versions of footprints, one being a mousebite with several drills and the other just being a straight piece of PCB edge. Then I just change the footprint at each location where a mousebite is or is not needed.

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I’ll bump this thread with a bug report I submitted, you could make use of when they fix it.
In present PcbNew, you cannot load Lib-value, via netlist.

You can create a netlist with no value line, and NET-in with no errors, but that blanks the part value.
ie it has fetched the Library part fine, and then replaced the Lib-value field you carefully put there, with blank. Almost works, just one bad decision.

When that is fixed, NET flows will be able to be optionally more BOM based, and use libraries of part-coded items.
Example -
Digikey part number order code RMCF0805FG1K00-ND
That’s RES 1K OHM 1% 1/8W 0805

I’ve also created a script that Exports a KiCad NETLIST from pcbnew, which can be useful as a verification check.
That’s also useful where import-Non-KiCad Board file was used - in this path, there may be no reference NET file.

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Could be an interesting tool to create parametric design such filter (e.g. creating a GUI to select butterwork, bessel, bandwidth, …) and etc…