Even if you personally never use premade footprints, it doesn’t mean that everyone else should follow your workflow. Also, I can’t see that if manufacturers provided KiCad footprints, it would in any way affect you, so it is a moot point anyway.
Lots of EDA users consider their tool valuable if the available library is large (built-in and easily expandable using ready made design resources).
To such users, ready symbols and footprints provided by part manufacturer may appear useful.
If you can get these resources for Altium or Eagle, why not for Kicad?
I personally don’t use ready made footprints nor symbols (except for trivial parts like r, l, c, d, t) - i do have my own library, but I know there are many who do use these.
Yeah but that fails the NIH test. (That stands for “Not Invented Here”, not “National Institute of Health”).
Seriously I never like the public footprints for my hand soldering.
Well this might be because most of them are not meant for hand soldering. (Only a few footprints like the standard resistor footprints exist in a hand soldering variation that has increased toe fillets)
In addition to widening the footprint in the dimension along which the pins extend, I also like to make the corner pads fatter. This helps in two ways:
More room for the soldering iron tip on the corner pads which I will typically solder first.
When positioning the IC on the pads, this reduces the tendency of the pins to “fall down” into the unplated areas between the pads.
I really think that providing parts and footprints is NOT the role of parts manufacturers. I would expect from them to provide only the 3D model (*.step).
The schematic representation is highly dependent on YOUR WAY of drawing schematics. When some users draw all pins as in physical part (I hate that), others will group them by category. If I use an STM32F4xx for camera acquisition system, I would prefer to have all pins related to DCMI (camera capture data) grouped, instead of having pins grouped by PORTxx number.
For footprints, the problem is the same. When you create a footprint for hand soldering of QFN for example, you would want to make the pins longer than recommanded pattern (idem for SSOP packages). When you use oven soldering at home with low cost manufactured PCB, you would ask your manufacturer to narrow a little bit the holes in the stencil and you would narrow a little bit the pins pattern from manufucaturer recommanded pattern, because you know you’ll put a little bit more solder paste than expected and this can lead to short circuits when you do assembly at home.
You need to see building PCBs process as a whole process with all its phases tightly linked to each other and not as a set of separate theroretically perfect input=>output.
Because KiCad is free, I think your argument is reasonable. (So therefore everyone working on the project can use full functioning software.) However in my most recent consulting job the pcb designer (not me) used DX Designer. His schematic symbols (for a 32 pin switching voltage regulator IC) had the pins “all over the map” (at least by my logic.) Viewing gerber files and a .pdf of the schematic, I had to search for IC pin 17, etc. on the schematic. It made my job of checking over the gerber files significantly more difficult. If the schematic had the IC pins arranged in actual order it would have been much easier.
But I have a counter-argument also. For example an LM324 quad op amp or maybe a multiple-gate logic chip. For that I want to see the individual op amp or gate logic symbols with pin numbers on the individual symbols. I suppose it might be OK if the op amp or logic symbols are superimposed on a package representation with all of the pins connected correctly…but that would make for a messy schematic.