But it was PCB made with KiCad V5 using graphic elements, and I’d like to have it as footprint.
Coil should have 2 SMD pads as its ends. How shield (at bottom) will be done is another subject. May be only margin lines at footprint to make zone circular shape and GND zone added at PCB. If some copper shield will be at once in footprint than bottom SMD pad will be the connection point for it. But now I am concentrating only at coil.
What I remember from trying to do it as footprint with V7 I had problems with these bottom sections. So now as I switched to V8 I do the try once more.
Here is how my current test antenna looks like:
Pin 2 was ^E^E to include lines into it. Pin 1 not.
For those who would like to experiment here is this footprint: TestAnt1.kicad_mod (4.1 KB)
At PCB looks like this:
Error is gone if I change this one THT pad number from 3 to 2, but then when routing at PCB this pad is also seen by connection lines as potential good connection. I can tolerate it (I know what point to connect to) if other advantages would be bigger.
On the pad 1 side where graphic lines were not included into pad 1 Error is not generated.
I supposed that my antenna will propagate nets into all its tracks until one point where net will be changed, but I don’t see how it can be easily done.
Fortunately even all is no net the zone filling works correct (I added GND here to check it).
For those who want to experiment with it the whole project: TestRfidAnt.zip (14.7 KB)
From pcbnew.pdf about user shape pads:
“For example, when editing a surface mount pad on F.Cu, any shapes that are onF.Cu and touch the base pad will become part of the custom pad.”
“If the base pad is a through hole pad, overlapping shapes on F.Cu will be combined in the custom pad. Because through hole pads have the same pad shape on all copper layers, this shape will become part of the custom pad on all copper layers, not just F.Cu.”
So one pad can not begin at top and then switch layer several times. Also THT pads can’t have separate line at bottom to one side and at top to the other. So if I’d like to have my top and bottom sections being not graphic shape but pads I would need to add there extra SMD pads at them.
If I will give them numbers 1 and 2 (and may be these THT pads also will have to be 1 and 2) I will may be get them getting net from connected tracks so I will not have no net lines in my antenna but I will get lot of anchors (snapping points).
I ask for ideas. How do you think it should be done the best?
I guess defining the footprint as a net tie may work. Definition of net ties has also changed a bit (or at least I think it did) but I have not looked into details.
It did generate a DRC violation between pads 2 and 3 of the footprint, but not between pads 1 and 3. The difference is that pad 1 is a simple SMT pad, while pad 2 is a complex pad with graphics added to the pad itself. So I tried:
Select the footprint in the PCB editor.
[Ctrl +e] to load it in the footprint editor.
Select pad 2 [Ctrl +e] to enter pad edit mode.
Move the slanted line away, so it does not overlap with the pad.
[Ctrl +e] to exit pad edit mode.
Move the line segment back to it’s previous position.
Close footprint editor, save changes back to the PCB.
Run DRC.
After this I did not have a DRC violation for hole clearance anymore. I still have two violations for missing libraries that were not included in your project.
I don’t trust the “archive project” function. It’s not very smart, it does not know which additonal files (documentation, pictures, datasheets, sub directories) you want to have in the zip file.
But it was no problem, because all needed parts are “cached” inside the schematic and PCB files. It’s just that the links to the external libraries are broken.
During: Schematic Editor / Tools / Update PCB from Schematic [F8] I also noticed:
It is surprising that line being part of pad at hole - error, and line being no net at hole - no error.
Relying on this may result in errors in V9
At beginning I supposed I will have each THT separate number as was not sure if with the same number and only lines (no tracks) not included into pads KiCad at PCB would not ask to connect them all (with the same number) additionally by tracks at PCB. So I assumed I will add as many not connected pins as it will be needed.
You can not have pad 3 if you give them numbers 1 and 2. No extra pin at schematic, but extra snapping points at PCB. There’s always something not perfect.
Do you remember what is the trick to have small pad number even when pad is extended with graphic elements. When I will add whole arc I will get pad number big as whole antenna.
Why? Net ties have for a long time been pads connected with graphic items, not overlapping pads. That has not changed.
I do not understand.
You are using pads with pad number 3 as vias in the footprint, and KiCad complains that there is no pin 3 in the schematic symbol. By adding a pad with number 3 to the schematic symbol, and setting it’s pin type to Unconnected, you explicitly tell KiCad those pad numbers three in the footprint are OK, and there are no connections to them.
OK. You are right.
I have never used net-ties. Reading from time to time at forum about user shape pads I supposed this is also used to connect pads in net tie.
But what wrong KiCad sees in SMD pad overlaping THT pad. In bottom thermal pad you place many THT pads and KiCad has no problem with it.
I wanted to say that may be I will give those pads numbers 1 and 2 and this way I will not have pad 3 so I expect to correct symbol as needed later. Really I suppose I will have 3 pads (1-antena, 2-GND, 3-antena). So if I will have these extra THT pads not 1 and 3 I will may be give them nr 0.
Pads can overlap if they have the same pad number.
Pads may also overlap if they have different pad numbers, but are connected to the same net. (This is for example used in some USB-C connector footprints. Some have pads on top of each other because pad names are standardized, and not all are separate pins on the footprint).
In your case, neither of these two conditions were true, and thus KiCad generated an error message.
