Power pin confusion

No the power flag is not a label!!! The power symbol is! Please do not confuse users with bad terminology. The power flag simply tells ERC that a given net has a supply at that point. More details: read above.

I will tell the same what was told in another words.
If at any net there is a pin of type ‘Power input’ (ICs have such pins) ERC signals an error if at that net there is no ‘Power output’ pin.
The arrows like (+12) can’t be ‘Power output’ as you use many such arrows at one net but you can’t have many Power outputs at one net.
You use PWR_FLAG to tell ERC that this particular net is powered even ERC don’t sees it.
If IC powering pins had a type ‘Passive’ or ‘Input’ you will not need to use PWR_FLAG but you will have less control of errors made in schematic.
I don’t have PWR_FLAGs at my schematics as I don’t use ERC.

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Thanks for the replies.

I think I’m understanding how it’s supposed to work, but…
In this case:
3p3

I get this DRC:
3p3_DRC

Pin 2 of U2 is defined as Power input. and the pin on R4 is defined Passive.
So, this DRC means the net is not powered (either by a pin defined as power output or with a Power flag on the net) anywhere else?

And in this case:

5V_74166

DRC says:
5V_74166_DRC

Pin 9 of U5 is defined as Input.
This is basically the same because there is no place where the 5V net is powered? (again, either by a pin defined as power output or with a Power flag on the net. ) Other places where 5V symbol is on a pin defined as Open Collector is not flagged by DRC…

This is correct. And is power flag usecase where you use it to propagate power over a passive device. (as explained above)

ERC does not complain about pin 9.

It complains that the pin of the power symbol is not driven. This is a side effect of power symbols being made with hidden power input pins (Yes this is a hack. In my opinion either a special pin type for generating labels or a pin property flag should exist that makes a pin into a label.)

An additional confusion is that KiCad does not prefer reporting real power pins over the ones that are part of a power symbol. (https://bugs.launchpad.net/kicad/+bug/1821436)

More questions…sorry. :frowning:

It’s obvious how to get from the DRC dialog to error arrow associated with the error, just go to the X,Y given in the error and by clicking the coordinates in the DRC dialog. IS there a way to go from the arrow to the message in the DRC dialog?

What is the correct way to define input/output/passive/etc. I haven’t found a doc on that… In any case, in this part it is a buck converter module currently defined:

PT5060

And, currently connected like this:

The device has Pins 8,9,10 as 12V out (in the datasheet). But DRC complains 9 is connected to 8, and 10, to 9 Power Outputs.

I assume there is no complaint about Pins 3,4,5 because they are defined as input. DRC does not complain having the 5V symbol connected to al three. But, there are several 5V symbols on the schematic, but none are driven. (One is connected to an Open Collector.)

I also have questions about the hidden pins on the 74166. DRC does not complain about pin 8 (hidden and named GND) and complains about pin 16 (hidden, labeled VCC) on one 74166 being not driven, but does not complain about it on the other 74166.

You have a few options for this.

  • Stack the pins. Make the visible one power out and the others passive. This enforces all of them being connected and ERC works quite well. Downside you do not see from the schematic that this visible pin represents multiple pins.
  • Have all pins visible next to each other
    • Make them all passive. You will need to connect a power flag to the pins to make ERC behave correctly. Benefit is you see all pins which some people prefer.
    • Make all of them power out. Live with the false positive ERC message. Benefit as above but without the need to place a power flag. Massive downside is that false positive reports can hide real reports.
    • Only one pin gets power:
      • The others can be passive. Saves you from needing the power flag but only if the power out pin is connected.
      • The others could even be power in. This would mean that ERC reminds you if they are not connected to the power out pin. Main downside is that this is quite counter-intuitive.

The official library uses the option of stacking with hidden pins passive.

I haven’t looked at the 74166 so my answer is based on what I know of how KiCad works in many situations…

  • First, you are only seeing one error because KiCad only shows one error per net (otherwise all pins on a net with an error will be flagged, potentially spamming you with errors).
  • Second, the hidden VCC pin will only connect to your power if you also connect a VCC label (either a regular label or the VCC power symbol) to what you are presumably calling +5V. (KiCad has no way of knowing what you plan on using as VCC; +5V, +3.3V, +1.8V, 3V3, Vusb, etc. KiCad really doesn’t have the understanding that what is called +5V is “five volts in the positive direction in reference to circuit ground”… You could call your VCC “Fred” and KiCad wouldn’t care.)
    This is why the current librarians eschew using hidden pins for power pins on a symbol. Using hidden pins for power pins works well for a single very narrow workflow, but makes things difficult for any other workflow. Unfortunately, I don’t think the 74xGxx nor the 74xx_IEEE libraries have gotten updates. (I just checked a couple symbols in the 74xx library that I installed with 5.1.4 and the ones I looked at don’t appear to be using hidden pins.)

The lack of a complaint on pins 3,4,5 is because you have them as regular “Input” instead of “Power Input”. If your entire +5V net is undriven, once you put a “Power Input” pin on that net you will get the error, unless you also put a Power Flag on the net somewhere. I’d advise putting the Power Flag near the source of your +5V net (the open collector?) as additional documentation for you to see where the +5V is coming from when reviewing the schematic later for troubleshooting and/or modification planning.

DRC is at PCB here is ERC.
All 5V symbols are one net and you get one error for that one net.
If you get many errors for 5V net you could suppose you need many PWR_FLAGs but you need only one for that one net.

A label on the +5V net fixed the error on the hidden VCC on the 74166, but the hidden GND (Power Input) still says not driven. Even with GND symbols on other places around the schema and a GND label on the net.

Is the 74166 just defined wrong?

I don’t believe the 74166 is wrong. Try adding another PWR_FLAG to the GND line - anywhere. Rerun the DRC and see what you get.

Piotr (way up above in this thread) says that the Pwr_Flag is just to prevent the DRC from griping. It does not do anything to the circuit.

The symbols with hidden power pins are in violation of the library convention.

@bobc converted the 74xx and 4xxx libs over to symbols with separate units for the power pins during the version 4 to version 5 development window. Sadly we did not have the manpower to convert the remaining logic libs.

Hopefully these will be fixed during the version 6 development phase.

Don’t use hidden pins.
Just believe me.

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hmm…what’s involved in converting the libraries?

Easy enough for ones I create.

The particular 74166 in this case is from the Digikey library, so, I didn’t change them cuz I figured they’d just get overwritten (typically, when I least expect it and when don’t want to afford the time. :wink: )

But I see I can use the the default lib instead. (I’m guessing since it has non-hidden power pins it’s a better choice anyway…not sure how good Digikey is about keeping up to date…)

I have never used other then my own libraries. I don’t understand what you can think about saying about keeping up to date. Once specified (form PCB point of view) element is for me endless valid.
Footprint dimensions rather don’t changes.

There are situations where hidden power pins make sense. However, most of those situations may have passed into history. Don’t use hidden power pins unless you truly know what you are doing and why.

Dale

(Aren’t you proud of me for NOT condensing this post into the American slang expression, “Only use hidden power pins if you have your feces amalgamated.”?)

Agree, but in those situations I see no big difference between using or not using hidden pins.

My advice was current, not historical.

Yes. I would not understood.
I sometimes stop myself at last moment before translating directly Polish slang sentences while writing here.

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I suppose creating, and maintaining, all your own libs has it’s advantages.

I create my own libraries when required. (For example, I have a rather large stock of old, and in some cases very old. Like me: :older_adult: And they typically aren’t in any library. Or, a little used part, like the thumb wheel switches I’m using on a project right now.)

As for keeping up to date, I was referring to libraries, like those provided by Digikey, that have, the now, non-preferred hidden power pins. Will they update to the now preferred displayed power pins…no clue.

I consider having existing libraries a great advantage. It’s good not to use my time to recreate the wheel. That, of course, can cause issues at times. :thinking:

(I will also note, that, in my past life (i.e. pre-retirement) I used softwares like Altium, PADS, and others in a corporate environment. There, any time we needed a new part symbol and footprint, we simply emailed the datasheet to a blackhole at the corporate headquarters and the new part would magically appear, implemented to corporate standards. So, maybe I’m spoiled. :slight_smile: )

In that sense keeping up to date is wrong thing. You get updated libs and elements you have used changes. KiCad helps by cache lib but I prefer to have elements at schematic (even old one) the same as in library.

You need not to recreate the wheel. You can copy elements from existing libraries to your library protecting them that way from unexpected changes when you install newer KiCad version.

In my ‘corporate’ PCB design team is me alone so I need not to mail datasheet :wink:

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So, do you copy all symbols and footprints into a library per project, or a single, local, library?