Following on from the previous announcement of the unification of length calculation code, KiCad now supports time domain / propagation delay calculations, tuning, and DRC rules. At the moment, it is only possible to specify propagation delays by hand, but future work will aim to add empirical (formula-based) and 2D field solver propagation delays derived from trace geometries and stackup definition.
The workflow is:
Set up Delay Profiles for subsets of geometries for which you would like time domain information / tuning:
Note that unit propagation speeds can be set up per-layer, and for vias. Unit propagation speeds can be input in units of ps/in, ps/cm, and ps/mm. Times may be input in units of ps and fs. It is also possible, for advanced simulated scenarios, to set up via overrides, which are specified based on the via start / end (e.g. to support blind and micro vias) and signal start / end layers.
Assign Delay Profiles to netclasses with the new Delay Profile field (you may need to right-click the table header to enable the column):
As for other netclass fields, if there are multiple netclasses assigned to a net, the effective Delay Profile will be taken from the highest-profile netclass with a Delay Profile assigned.
Footprint pads now have a ‘Pad-to-die delay’ field, visible in the pad properties dialog and the properties panel.
Now, any measurements for nets matching assigned netclasses will display timing information in the status bar, and can show time information in the Net Inspector by choosing ‘Show Time Domain Details’ in the inspector configuration menu:
The tuning tools will switch to time domain mode automatically where timing information is available and DRC constraints are specified in time domain units:
To assist with entering propagation delay values for the delay tuning setup above, the PCB Calculator now calculates unit propagation delays for microstrip, coplaner wave guide, coupled microstrip, and stripline geometries :
The PCB Calculator now provides analysis and synthesis of symmetric coupled striplines. This implements the standard calculations found in
S. B. Cohn, “Shielded Coupled-Strip Transmission Line,” in IRE Transactions on Microwave Theory and Techniques, vol. 3, no. 5, pp. 29-38, October 1955
and
S. B. Cohn, “Characteristic Impedance of the Shielded-Strip Transmission Line,” in Transactions of the IRE Professional Group on Microwave Theory and Techniques, vol. 2, no. 2, pp. 52-57, July 1954
This should hopefully make wrangling pin data easier for very large symbols, where more powerful spreadsheet tools can help, as well as provide a rough-and-ready import mechanism for pin data converted from other sources, without having to write a full-scale symbol generator.
There are also a couple of new filters:
Limit the pins shown to a specific body style
Limit the pins show to those selected when the dialog was opened
An option to reset the alternate pin definition back to the default pin has been added to the update/change symbol dialog. This will be back ported to 9.0 because it contains a few pin alternate bug fixes and improves the dialog layout which was getting a bit too tall.
Footprints can now specify objects on defined inner layer, and can also opt into any set of user layers rather than just four. E.g. this footprint has a shape on In2 (orange) and a rule area on In1 (green):
To use this, you must define a specific stackup for the footprint by choosing the number of copper layers and adding any user layers that you want.
Layers are 1:1 with the board layers. Objects defined on layers that don’t exist on the board are not shown, but remain in the footprint on the board and will be used if you increase board layers.
If you do not set a stackup, the default is the current behaviour where rule areas on In1 are “expanded” to all inner layers.
