Pos file and footprint orientation

[eelik]

Is there no standard for pick and place?

This question is not about KiCad in particular but rather about the pick-and-place workflow in general. I just made a PCB and had it assembled by JLCPCB. The workflow was that I exported a .pos and a .drl file using KiCad’s Fabrication Outputs functionality and uploaded it to them. However, the rotation (pin 1 alignment) was mostly wrong and there was a production step where they manually fixed the positions. I was wondering, is this the normal way? Or is there a problem with JLCPCB’s process…