Place a pad (or part of one) under solder mask?

[Ladasky]

A previous KiCAD designer on our team designed a Bluetooth antenna from a series of traces and, of course, a separate capacitor footprint. All traces were of a precise width and length as specified in an antenna design program to which I do not have access.

I needed to design a new board which includes this antenna. It was very difficult to move this antenna around the PCB during the design process. So I designed a footprint for a Bluetooth antenna with an accompanying output capacitor. You can drag and drop the whole thing as a single unit.

I thought this was pretty clever.

And it does everything I want, except for one thing: Since the antenna is defined as an irregular pad, the whole antenna is exposed. I don’t know whether that matters, but in the reference design the antenna region is under the solder mask.

I know how to expose regions of a footprint by defining polygons on the solder mask layer. Is it possible to go the other way, and require that certain copper regions be covered in solder mask?

EDIT: I should mention that I’m using KiCAD 5.1.5.

Thanks for your help!

[Ladasky]

Following up to myself: this post appears to be related to my problem.

Cover exposed pads with solder mask for EMC reasons

Hello Guys, Need some help. I am designing EMC protected components, and to achive that I use additional exposed (Vss) pads in between the pads. The question is how can I cover these exposed pads with solder mask, or how can I achive that on the stencil the pad wont be cut out? Thank you in advance.

I have constructed an alternative footprint which has two pads with the same number; a small rectangle, defined on both the solder paste and solder mask layers for attaching the capacitor; and the large antenna shape, defined only on the solder paste layer. I am checking whether it works and will follow up with my findings.

[Rene_Poschl]

@Ladasky

I have constructed an alternative footprint which has two pads with the same number; a small rectangle, defined on both the solder paste and solder mask layers for attaching the capacitor; and the large antenna shape

You really have two things in the same footprint. The capacitor footprint (or half of it) and the antenna.

You might therefore need to check if the pick and place guys can handle it this way. Make sure that the anchor of the footprint (=origin in the footprint editor) is aligned for the capacitor and that the orientation is fitting your assembly process.

[pedro]

@Ladasky

I know how to expose regions of a footprint by defining polygons on the solder mask layer. Is it possible to go the other way, and require that certain copper regions be covered in solder mask?

I made a PIFA antenna some years ago. It was made with track segments, not with pads. This way the antenna gets covered by solder, the copper is not exposed.

It seems your is also made with track segments. Anyway, can you share your footprint so we can try to remove the mask?

[Ladasky]

Good point, Rene. I see that KiCAD footprints in the standard library have multiple pads with the same number, and I figured I would be able to do the same. The PCB production output looks correct. I modified an 0402 (1005 metric) capacitor footprint to make my antenna footprint. One of the two pads numbered “1” is the capacitor pad and the anchor was not moved for that pad. The antenna pad numbered “1” has a different anchor. It should be obvious how to place the capacitor but I will check with the manufacturer who will stuff the boards.

In the worst case, once I know exactly where the antenna will be placed, I can replace it with two separate footprints so that the board stuffing process is not confusing.

[Ladasky]

Hi Pedro,

If I could include track segments in a footprint definition, that’s exactly what I would do. The antenna footprint that I made is a close copy of an antenna made by a previous designer on this project. He made his antenna from four traces whose relative positions have to remain fixed. As I said, it was very difficult to ensure this while editing the new PCB.

I traced over the original antenna design with a polygon. I used many points at the far end so that it has the same rounded shape as a trace. It is not a a trace.

I will post updates a little later. I think I have something that works now, but it might be improved.

[Ladasky]

Following up again to myself, and to the helpful comments from @Rene_Poschl and @pedro.

I have attached a copy of the footprint file that I am currently using. As I said, it appears to work, but it may not be ideal.C_0402_1005Metric_with_2.4GHz_antenna.kicad_mod (8.2 KB)

Here are some screen shots from the design and testing process.

First, I show how I started with a two-pad 0402 capacitor footprint. I added a duplicate pad numbered 1 and a polygon defining the antenna shape. I then created an irregular pad from the duplicate pad 1 and the polygon. The polygon touches the edge of the original pad 1 exactly but does not overlap it.

As guided by the post I found and linked above, I clicked on the irregular pad and unchecked the “F.Mask” layer in the Technical Layers section on the right, leaving only “F.Paste”. The technical layers for the other pad 1, where the capacitor will be soldered, were not changed.

When I imported this footprint into a layout, the copper layers looked fine by eye. But KiCAD does not recognize the two pad 1’s as connected, even though there is zero distance between them.

I was afraid to overlap the pads when I was making the footprint. Maybe that is permitted. I did not investigate. Instead I connected the two pad 1 anchors with a trace that you cannot see, but which satisfies KiCAD.

The 3D render looks a bit strange. KiCAD can’t seem to decide whether the antenna is above or below the solder mask.

However, when I uploaded the layout to our PCB manufacturer’s web site and looked at their stack-up image, it looks like the antenna is protected by the solder mask, as I want it to be:

Comments and suggestions for improvement are appreciated. Thanks!

[pedro]

Hi John,
The antenna footprint looks well. It can also be done with “Add graphic line” on F.SilkS and then edit each segment and change the layer to F.Cu or B.Cu. A segment cannot be drawn directly on copper layers.

In your footprint select only the F.Mask layer. You will see mask only on the 0402 pads, meaning the antenna is covered by solder as wished.

[Rene_Poschl]

I would not use graphic lines on a copper layer as i am not sure if DRC takes them into account properly. Pads however are guaranteed to work.

[pedro]

As far as I have found this type of antenna for years, the antenna is placed “outside” the rest of the circuit, nothing can be placed around it. Visual inspection is a must independently of DRC. Even a component placed a 1 mm with a 0.2 clearance would pass the DRC and break the antenna performance.

We made our antenna with kicad2006 so it was the only way we had. In fact with that version the graphic line could be done directly on F.Cu. Moreover, we couldn’t edit the segment to enter the length with numbers.