Pin swapping in PCB

I saw there is a old-plug in for this for sch. But what is really required is something different.
What it has to do :
two scenarios :
Suppose I am routing a diff pair, and I get to the ‘end’ and the _P and _N pads are transposed - that is, my diff pairs would need to cross each other to connect to the pads. The rats nest connections off the ends of my traces will cross.

Solution (for most instances ) - User pauses routing, and select by menu or my keystroke, SWAP, then clicks on of the diff pairs, then clicks the other. Voila ! the NETS on those pads and associated connected copper are swapped. Then I continue routing and complete the diff pair connection.

At a convenient time, I have to UPDATE SCH from PCB.
This then swaps the NET names in SCH. Note- this only works if my pins in SCH have stubs with their net name, so the tool only needs to swap net names, and does not (can not) move wires.

This is a continuous task when wiring up a FPGA.

Another example- say I want to use a different pin for my IO (maybe a different single pin, or maybe I want to swap a bunch of diff pair pins) . Again, pause routing, click/key SWAP, then click first pad, then second pad and voila , the NETS swap. Then I go and update the SCH.

IE is is a 'engage swapper, select 1st pin with first click , select 2nd pin with 2nd click ’ function.

Ideally it should swap all copper connected nets attached to the pad, this is because one goes through and attaches fanouts to the balls behind any routing. so the stringers have to change net name also.

The changes occur in the netlist level in PCB, and the tool updates te board and copper, and the rats-nest needs to update also to provide confirmation to the user.
then are reflected back into SCH when the update SCH command.

An option / ideally, schematic pins should have a property CAN BE SWAPPED, however this should not be retained in the schematic symbol, in case the symbol is updated. It would need to be in a separate table. IE a list of pins on a component Like U1-1, U1-2, U1-3 (or the UUID designator) and 0 or 1 for if that pin is permitted to be swapped or not , this can stop you swapping what you shouldnt some some obscure reason . this is nice but a big extra step. basic pin swapping will do for 99.99% of requirements.

Now, there are many enhancements to this, in fact Altium permits part swaps (say swap which inverter of a 6 pack inverter you migth use at the pcb , and allows you to define what pins you can and cannot swap- ) very elaborate but hardly necessary. , well the CAN BE SWAPPED property is a useful one I guess. But the pad net swapping is essential.
For some background on the full bottle Altium version :slight_smile: Swapping Pins, Pairs and Parts in a Design in Altium Designer | Altium Designer 24 Technical Documentation
-glen

There is a bit of a problem with this:

If you swap the connections of a differential pair, then your circuit very likely does not work anymore.

For the rest, pin & gate swapping is (not yet) directly supported in KiCad. The topic below has some more background (Work around by changing the schematic and forward annotation) and a link to an open issue on gitlab.

No : on an FPGA you can invert the insides… and some communications protocols can allow it ( they are edge sensitive) OR not polarity sensitive (NRZ etc) , and some device, like most network PHYs permit swapping the + and - in configuration.
But usually, you are moving a signal to a different pin (or pin pair )
In Altium you can have swap groups , so say you have a microcontrolle,r you can make all the analog ADC input capable pins one swap group, all the DAC pins another swap group . BUT that’s nice but the basics are needed before this sort of stuff.

As for part swapping - is more intuitive at the SCH level. I do not see anyone doing part swapping at PCB level. But you might swap an opamp in a quad… (I don’t - I swap them in sch)

Sure, if you add those conditions, then it may work. But in your opening post you implied that every differential pair could be swapped and that is not true.

This is called “gate” swapping, not “part” swapping (What is a part?) This was a big thing 30 years ago, in the era of big PCB’s with 100+ TTL IC’s. But now, doing it in the schematic is indeed a mostly adequate workaround, and I guess that is at least a part of the reason why the gitlab issue I linked to indirectly is still open after 16 years.

In other cad packages, a part a subsymbol of a device. also called subparts.
IE a (sub)part can be a,b,c,d opamps
or a (sub)part. can be one of say 15 subparts of an FPGA that get put on separate SCH sheets. It;s not unsual to have a 1152 ball BGA with 20 sub parts, spanned across 20 sheets.
I’ll use the term subpart from now on.

I would not use the word “gate” . gate is a gate. a subpart of a quad opamp , you would not call that a gate , surely ?

“Gate swapping” has become industry standard jargon, and it has a reasonably well defined meaning, even if it is used for a quad opamp (or for a bunch of opamps divided over multiple footprints).

Also consider for example “silkscreen”. Silkscreen printing has been out of fashion for many years. Some people use the name “legend” layer, which is more correct, but many people and also software (such as KiCad) keep on using the old name.

Shall we leave it at that? I see no benefit in further derailing this thread for a small thing as this.

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I know Paul posted this in the linked forum thread, but for future discovery I’ll just mention that there is a gitlab issue for this that would love some additional thumbs up:

and the extension proposed on top of very basic pin swapping:

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The plugin was more or less what you required. But it was awkward to use as it required the schematics to be closed as it modified the schematics files directly and being a plugin its action was not bound the keyboard shortcut.

The swap unit plugin worked more or less the same.

Given that at the time python API for schematics was promised and schematic format is/was changing continuously (with V5/V6 radical format change) I did not port these plugins to V6.

If we get python API to access schematics in V9 I might consider redoing the plugin.

OK how about :
It would be acceptable for the plug in , running in PCB (which is where the action is) to write a file , and then with a SCH plugin , the user fires the plugin , this loads that update file and modifies the SCH ?

@MitjaN
We’re having a discussion on this in dev forum

Yeah this would bi slightly better as schematics would not need to be closed as back annotation would be done through additional file. But Schematics editor has no plugin interface. So I can only wait for V9 as I am proficient only in python. With V9 we should at least get python API in schematics. This should make possible to at least implement your proposal. But if the API would be versatile enough, then we might get around without intermediate file.

But if there is someone willing to implement this natively, then I believe that looking at “geographical reannotate” feature should offer a good start how to handle PCB->SCH communication.

Oh no plug in in SCH ? doh. anyway, discussing in dev, have sent you a PM.

PIN NET SWAPPING : this is how it looks when it gets done in Altium-

PIN NETs in sch before …
image

in PCB, see there is a cross over on the rats nest.
image

swap it using the swap tool
image

and update SCH from PCB, tool has updated net labels.
image
In this case I swapped the nets on the FPGA side of the connection, but I could have swapped them on the DAC chip side…

The pin swapping you’ve shown can be done using the WireIt plugin. After swapping one or more wires, it will generate a file listing the net swaps that you have to manually swap in the schematic.

interesting. We’re working on full integration.

Without a schematic API, the only way I can see to do that is to write an external utility to apply the pin-swap file from WireIt to the schematic files.

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