PCB Land Pattern Layout vs Solder Paste Stencil


In a few of the datasheet’s I’ve been working with, they’ve shown both a stencil dimension and Land Pattern dimensions. Do I need to specify both of these for the pad dimensions, or how does that work?

Page 6 shows an example of this


Stencil is solder-paste (F.Paste and B.Paste layers in KiCad). The land pattern shows the copper areas (F.Cu and B.Cu etc) and also a mask for the solder resist (F.Mask, B.Mask). You’d have to make separate pads for something like what is shown in the datasheet you linked. One pad for the copper and solder-resist part (it’s a good idea to have a 0.07mm clearance of the solder resist cutout to the copper but you can specify this as a global value) and some others for the stencil. That stencil would be especially difficult with the KiCad footprint editor currently because of the arc shapes.

I’d say go with the copper in general. This will at least make sure the part fits on there. In KiCad the “Pads Mask Clearance” should take care of this on at a board-wide level.

This is a global characteristic, you can also change it for the individual footprint right click on a footprint in the layout and click “edit” to bring up this dialog. You can override the global value on individual footprints:

And finally, if you need to do this on a super low level, you can go into the module editor and edit pads one by one. You would use the copper dimensions and then could set the pad clearance one by one.

That’s a bit of a confusing statement Chris. In the attached datasheet, if you go with the land-pattern for your stencil layer you will just get a massive hole instead of a ring.

Good info on the global pad mask clearance setting though. I generally set this to 0.07mm as this allegedly helps the solder stay where it is supposed to.

Oh yes, that was confusing language. I should have said, “Focus on the copper layer for creating pads, the stencil stuff should be considered once the pad is the proper size”.

About the mentioned datasheet, this might work ok as an example (it’s not the same part, I took a current / available part from Digi-Key):

InvenSense_INMP504.kicad_mod (2.0 KB)

I’d really have preferred to have some solder resist between the mic hole and the ground ring, but that’s a a bit of a challenge in KiCad.

Hmm ok I think I understand -

In general, the most important pad to consider is the copper pad, which makes sense.

Then, is it necessary for me to create a solder paste (or stencil) pad? Would PCB manufacturers require this? Do I need to create a solder mask layer too? Is this also required by PCB manufacturers?

It sounds like, Chris, you are saying that the mask layer is something I can set globally and not mess with it anymore. Does the resist layer populate all Copper pads automatically? Or do would I still need to create this layer in each footprint?

And just for clarity - the solder paste layer is used by the manufacturer to determine where to deposit solder paste on the pad, but what is the solder resist layer for?

Thanks everyone!

The solder paste (stencil) layer will only be used by whomever is assembling your board. If you are building it yourself by hand soldering, you won’t use this layer at all. This layer is what you would send to OSHstencils or Ohararp for getting laser cut kapton stencils. If you had an assembler building your board, they would (likely) use these files to get stanless steel stencils made.

So if you set the global value, it’ll just take whatever your pad size is and widen or narrow the pad based upon your global value. This will set how much solder will be layered on top of the pad in assembly.

As for the soldermask, this is also settable in the global dialog. This value is actually much more relevant to getting a PCB made. The soldermask layer (the purple stuff for OSHpark, green for many other types of PCBs) will determine where the copper is actually exposed. You can set this width because some manufacturers don’t want to put the soldermask right up to the edge of the copper pad.

Here’s a drawing, hope it’s helpful


To show you an example:

The sheet is made by sending the front paste layer to OSHStencils.com. You wipe solder paste over it and end up with the right amount of paste for each pad. The paste can be seen on the pads below (before reflowing):

The small parts measure 1.6x0.8mm, the whole thing fits inside a USB connector (minus the thickness in this case, it’s still an experimental board).


Spectactular! :smiley:

Great info Chris and Stefan! Thank you very much, this makes a lot of sense!

I realize this might be slightly offtopic, but I have to try anyway: that’s a Kinetis K22 microcontroller, in what looks to be an 121 XFBGA package. Is that a two-layer board done in KiCad? You actually managed to escape all the necessary BGA signals?

I’m about to switch from K20 to K22 in a new project (USB without a crystal!) that is space-constrained and have been looking at 64 MAPBGA and 121 XFBGA packages, but wasn’t sure if it’s doable at all on a two-layer board.

Hi jwr,

I’ve managed to escape the bare minimum in traces. A pinout and some more pics can be seen here:


I took the K22 for crystal-less operation and 5V tolerance too. The solderability wasn’t that good, I think the very minimal pad size might have affected the heat transfer to the BGA balls a bit. After a second reflow run it seemed to have settled better. Next iteration I’m going to check out what square pads under the balls do. I hope the less optimal pad shape is offset by the increase in pad area.

After reflowing this particular MCU exhibits a reset loop on powerup, I haven’t really had the time to debug it further, but it seems to be a known issue with the Kinetis (according to some of their forum topics) and will likely be gone after programming it. As far as I could tell with some quick probing the right signals are going to the right places.

Back to KiCad: Be aware that there is a bug in KiCad when routing angled pads, if you can use it in a standard 0/90/etc degree orientation the PnS router is able to route much closer.

Thanks — this is all very interesting. I think many here would also be interested in details — did you use soldermask-defined pads? Which pad sizes worked and which ones did not?

I checked several cheap manufacturers (iteadstudio, shenzen2u) and the minimum via size is 24mil, I don’t see how you can fit that between 0.4mm-pitch balls. I am unclear on the minimum total via size at OSHpark. I think it’s 20mil for 2-layer boards and 14mil for 4-layer boards, but I’m not certain.

I will take our Kinetis K22 discussion offline, since it is off-topic here.