From the footprint all looks good, except the DRC complains in the board layout because the Copper of the antenna is not assigned any net, and Kicad complains with ‘Clearence Violation’
I could Ignore these specific warnings for the antenna, but was looking for a better way to do things. Is there any?
I had the same problems when I used a Copper polygon to draw the triangle shape line from the PA output pin to the Antenna trace, which I fixed by converting the polygon into a zone with a matching assigned net. How can I do the same here?
Also, because the Antenna as 2 ports, feed and ground how would I make the transition in the component itself?
In KiCad V5 I have defined such antenna directly at PCB having both end shorted at schematic (wire at schematic not going directly but suggesting that it is an antenna, but of course both ends had the same net).
With V7 (one of first versions) I have done some tries to do it as footprint but didn’t found the way to have tracks at top + vias + tracks at bottom as one pad connected with net-tie to the other pad.
As I needed to do the next version of the same PCB I just copied PCB with that antenna.
I’m not sure if using net-tie it is possible to make such footprint including vias and tracks at bottom.
why not set up some rules to specifically ignore it so it does not produce any errors ?
BTW dont skimp on via size with this sort of antenna- be sure to compute the thru-via copper loss (worse case) and the trace copper loss. it adds up…
