Pad is connected Brake_{gnd}

[junbae]

in fact it is not connected to Brake_{gnd} in schemetic… but when i make the PCB, all pads connected to GND are connected to Brake_{gnd}

How can i fix it

I think all the pads are in the Brake_{gnd} net list group

[Claudio.Lorini]

@junbae

in fact it is not connected to Brake_{gnd} in schemetic

that’s not what KC thinks. please attach schematic (an possibly KC info), an answer could be much easier.

[junbae]

maybe its not correct way to design schemetic.
J2 connector(pin number 2) is labeled LV- but In PCB it is in Brake_{gnd} netlist

[Claudio.Lorini]

GND and LV- are connected in your schematic. The algorithm for deciding the resulting name of the net is based on priority of different objects.
I remember a post where the priority logic was explained, maybe this one:

7.0 precedence of net classes of hierarchical sheets

Hi all, Is it possible to set some sort of precedence for the net classes, if they’re defined in hiearchical sheets. The problem is the following: I have a number of LVDS lanes, which are labelled LDVS1_N/P, LDVS2_N/P etc. These lanes are connected on one end to a chip, on the other end to a card edge connector like so [image] (Differential signals are red.) The connector and the chip are parts of two different sheets. As soon as I connect the connector pins to the differential lines, the n…

[junbae]

thanks for your help!