Hey all,
I am following TI’s layout for a differential I2C buffer,
Because I don’t want to call my ‘TX-SDA’ line ‘GND’ (or rather, my GND becomes TX-SDA’, I added a net-tie. However, I don’t think net-ties work great with grounds 
I keep getting DRC violation errors, no matter what I set my clearances (on the tie, or the pads). One reason might be, because the clearance rules are ignored. First, Here’s what happens when my net tie goes to ground. No matter what kind of connection I do, the pad is simply too close to the ‘neutral tie’ which always reports a violation, regardless if I use thermal relieves or a VIA. If I do not connect it, or connect it via a trace, it’s fine of course.
If I disable the solid fill, I get thermal spokes, but they run to the upper half of the pad, which is where the net tie lives.
Also interesting to see, is that we see the ‘pad clearance request’ in the circle, but it’s being ignored. Probably because both are GND so kicad thinks it should use the zone clearance instead of the pad clearance.
Even adding a trace, doesn’t help, because the clearance of the pad is being ignored. I’ve used 0.75 clearance on the net-tie, but that’s not enough for the lower half, if I make it slightly bigger, the upper half bumps into the through hole. I can add more traces/space, but it’s annoying and ugly 
I had the same problem putting the net tie in the through hole, so that it’s ‘mostly hidden’ but of course, it was complaining there too. I’d almost say, the PCB of the net-tie should be probably ignored on a lot of checks or something.