Hello folks,
I am trying to use a sheet pin into a bus on the parent schematic, and have a name on the schematic, like so:
It works when the bus is directly connected. If I break it and name it “inbus”, the pins are not connected.
I have read the documentation on the bus labels but I am not sure why this does not work and would like some pointers. Thanks!
This is mostly an old method meant for maintaining support for old KiCad versions. I recommend you look into Schematic Editor / File / Schematic Setup / Project / Bus Alias Definitions, and then use the bus foldout method (at least for the first few members). Once you have a bit of experience, you can use the [Ins] key to create labels with auto-increment.
Or use a vector bus directly. That is more fitting in this case. This is described in the manual.
A while back I have also created and posted an example with a few buses:
Thank you for the fast reply.
So “sheet pins” are legacy and should be ditched in favor of global bus labels?
I have tried the aliases - I am a bit confused.Why does the in{0…2} definition for this not work here?
Oh good grief I see I need to use [0. .2], not curly braces…
Anyways, sheet pins should be ignored and only global bus labels used, yes?
The curly braces are used for a group bus, and can be used with the bus alias substitution list. The "array notation with the square braces and dots is the “vector bus” notation. Both are described in the manual.
No, don’t ignore the sheet labels / pins. In KiCad, a whole bus can be renamed though the hierarchy without losing connections in the bus. It works quite well, but you do have to be careful with the syntax.
Make a copy of the example I linked to, and experiment with it. Change some names, add some new ones, and verify it all still works. And then, only when you understand the syntax, start using it in a real project.
Thanks for taking your time here.
I was able to figure out the syntax for the buses I needed for now; I will play with the hierarchical labels at some point if it becomes necessary.
And yes, btw, the bus aliases appear to be stored in the root schematic and can be used on all subsheets, too.
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