We just changed the file naming system for the design rules files.
Previously the file was just called drc-rules but that was problematic because we don’t prevent more than one project in a directory. So, now the file is called <boardname>.kicad_dru
If you have an existing project that you’ve been testing with, you must manually rename the file (or else open your old file in a text editor and paste the contents into the design rules setup dialog in PcbNew)
I’m trying to create a rule that allows me to highlight if the center distance between testpoints is less than 2.54mm.
Or since I use testpoints with a diameter of 1mm, the distance between the pads should be 1.54mm.
I have made several attempts but the DRC does not show me errors even if I approach your testpoints with each other with spacing between the pads less than 1.54mm.
I don’t know how to specify in the expression that a pad is part of a component in this case the testpoint.
An example:
(version 1)
(rule “Distance between test points”
(constraint clearance (min 2.54mm))
(condition “A.memberOf (‘TP29’) && B.memberOf (‘TP30’)”)
)
I had seen an example with padOf but this no longer exists in the last nightly.
Perhaps this type of rule is not yet possible to implement?
Thanks
NB:
I had opened a discussion where I also posted photos.
Clearance constraints are not checked when the net is the same, so that’s your first problem. Try using hole_clearance instead.
Second, memberOf() is only for groups, not footprints. So you’ll need to edit your test point footprint to add the pad to a group with a name. (But they can all be the same name, which will making writing the rule easier.)
Thanks,
I created the rule using the group name and it worked for all test points that are not on the same net.
For the test points on the same net what can I do? the pad is SMD and has no through holes.
I added “hole_clearance” but test points that break the rule are not detected.
I could use a graphics layer that has the same diameter as the pad.
I’ll do a test tomorrow.
I added a circle around the edge of the pad with both F. Silkscreen and courtyard.
I have tried with both silk_clearance and courtyard_clarance but the error is not encountered.
There are only warnings that silk covers the solder mask.
Is there anyway to set clearance rules based upon soldermask?
900V at altitude requires 3.5mm with some form of coating (either paryleen or resist ) BUT uncoated pads would need 12-15mm. This could be screw terminals and thus would not be coated unless absolutely necessary due to the extra steps involved.
Likewise, does this take into consideration board cuts? slots are typically used to increase the creepage path (at the expense of mechanical robustness) while keep the board small
I thought the problem of alerts between the same pad was due to the hidden text on the silk layer.
I changed the text to F.Fab but the problem remains.
I don’t understand what is detected.
Maybe because the diameter of the circle is smaller than the minimum distance?
I thought the problem of alerts between the same pad was due to the hidden text on the silk layer.
I changed the text to F.Fab but the problem remains.
I don’t understand what is detected.
Maybe because the diameter of the circle is smaller than the minimum distance?
Shouldn’t it test between its parts?
Since I used A. and B. no?
Yes, I solved it by leaving only the silk circle in the group then I had to change the distances of the rule and the diameter of the circle otherwise there are problems with the soldermask which in my case is set in the global specifications to 0.05mm.
Thanks
yup its in this thread somewhere where I made the suggestion of edge cut creepage
HOWEVER, that was more of a z-axis consideration (in2 -> edge -> up -> edge -> in1 type thing). This is something I get very specific about.
what i describe here was more of an x-y around a slot. They are comparable creepage considerations, just different concerns.
Any idea about the difference between coated copper (resist or conformal) vs un-coated. This is one of the primary use-case considerations w.r.t. high-voltage.
I guess once there is some way of using net-ties (without the copper part) such that different parts of a net can have a different label while being treated the same would help as you could assign a label close to what would be the exposed pad. Right now the physical copper net-ties appear to be the workaround but they are well…