Need some guinea pigs for a rule-based DRC <<PROTOTYPE>>

Software
145

I have searched through a lot of posts and finally found this. I am trying to set rules using this system but I just cannot figure it out. It seems syntax has changed over time, it is really difficult to start testing this without a clear starting point. The whole selector is not even covered in the syntax help in 5.99.

My goal: set clearance between two net classes to a different value than clearance inside the net class. Currently I have the following:

(version 1.00)

(rule HV
   (constraint clearance (min 0.5mm))
   (condition "A.netclass == HV && B.netclass == HV"))

(rule HV_Default
   (constraint clearance (min 3.0mm))
   (condition "A.netclass == HV && B.netclass == Default"))

(selector (match_netclass "HV") (rule "HV") (rule "HV_Default"))

However, this still sets a clearance of 3.0 mm between pads of components inside net class “HV”. I am really eager to use this but I am really missing a clear overview and explanation of the syntax.

Edit: this also does not work, here the 3.0mm is completely ignored:

(version 1.00)

(rule HV
   (constraint clearance (min 0.5mm))
   (condition "A.netclass == HV && B.netclass == HV"))

(rule HV_Default
   (constraint clearance (min 3.0mm))
   (condition "A.netclass == HV && B.netclass == Default"))

(selector (match_netclass "HV") (rule "HV"))
(selector (match_netclass "HV") (match_netclass "Default") (rule "HV_Default"))

To be complete: I need to set a clearance between all conducting parts (tracks, vias, pads) of all components in one net class and another. The clearance between parts of components in the same net class have to be much smaller. The application is isolation between high voltage referenced parts and low voltage side. This could also be achieved by adding a keepout zone with the correct width, but of course it would be much nicer to have this set in rules that DRC can use.

146

Yes, following this is increasingly more and more difficult. @JeffYoung, would this be a good moment to start a new thread with better introduction and continue with the newer expression syntax with some examples?

“selector” isn’t used anymore, you probably should be able to do it with costraints and conditions only. Selectors were replaced with expressions in the conditions.

147

I won’t speak for Jeff, but even though I know many people are excited about this feature, it might be best to hold off trying to use it for serious work until after feature freeze. The DRC system is still changing, and the rules system needs to keep up with it. Writing documentation, examples, etc. takes time that I think the dev team would rather spend on code before the feature freeze is in place.

148

I understand that, but I mean continuing this “guinea pig” testing, which would be easier if the current state would be better explained without need to browse through two gazillions of posts. Jumping on board now is difficult.

EDIT: most of the posts in this thread are now outdated in one way or another, pertaining to old syntax or already fixed bugs.

149

@eelik that sums up pretty well how I’m feeling as an outsider just coming across this, maybe just a fresh topic would already suffice to continue testing.

Is there any clue on which time scale feature freeze will happen and a release will be made? I know v6 has been in the works for a while and per the road map my guess still quite some time is needed for a stable release with its features.

150

See Post-v5 new features and development news and the next post by Seth.

File format freeze is actually more important for end users for many purposes, also WRT to the DRC rules, but I haven’t heard about plans for that.

151

Conditions replaced selectors. So just use:

(version 1.00)

(rule HV
   (constraint clearance (min 0.5mm))
   (condition "A.netclass == HV && B.netclass == HV"))

(rule HV_Default
   (constraint clearance (min 3.0mm))
   (condition "A.netclass == HV && B.netclass == Default"))

You may need single quotes around the netclass names:

(version 1.00)

(rule HV
   (constraint clearance (min 0.5mm))
   (condition "A.netclass == 'HV' && B.netclass == 'HV'"))

(rule HV_Default
   (constraint clearance (min 3.0mm))
   (condition "A.netclass == 'HV' && B.netclass == 'Default'"))
152

You definitely need the single quotes.

(To check your syntax click the bug icon at the bottom of the Rules Editor.)

153

Possibly. I worry that it will still experience a few more changes. (On the other hand, it’s a lot more stable than it was.)

154

I think for the sake of new people coming across this thread (like @Bastiaan) we should not do a new thread until after feature freeze

155

Then just explain the half-time situation and edit the first post with a link to the latter post.

156

This thread is for adventurous users who want to test a feature that is changing while they test it, and accept the pain and confusion that comes from doing so. I think it would be good to have another thread once we are at the point where the feature is stable enough that we want to do things like write more official samples, and avoid changing the syntax / doing other changes that confuse people. Before we are at that point, I’m not sure the value of a new thread.

157

Before feature freeze, I would like a feature that allows to specify another clearance if there is a slot inbetween. Sometimes we make another cutout and then a smaller clearance may be used.

So one could solve the following problem:

grafik
grafik741×467 8.22 KB

@JeffYoung @craftyjon

158

Unfortunately calculation of creepage is not a quick thing to add, as far as I know.

159

Is it still true that edge cut clearance isn’t implemented?

Related to that, is there a reason why edge cuts should be handled as a special case? Could we define any layer with graphics as a condition for clearance rules?

160

I get some undefined error:

image
image578×591 13.8 KB

EDIT: fpko is a keepout in a footprint.

(version 1)
(rule "c"
    (condition "A.insideArea('fpko') && (A.Type == 'track')")
    (constraint clearance(min 0mm))
)
161

A related question, even though it’s not directly about this new prototype.

If I have Copper edge clearance set to 0 in Board Settings -> Design Rules -> Constraints, I can place a footprint pad very near to the edge. However, I can’t place the pad on the edge so that it overlaps the edge line middle line.

Is this on purpose? If the new DRC rule system works in a similar way, i.e. zero means “can be next to, but not overlap”, how do I allow placing a pad on the line, which is the same as “ignore copper-to-edge altogether”?

162

I’m not sure what you’re trying to do here. You’ve told the DRC engine that tracks inside a keepout can have 0 clearance with the keepout (that is, they can touch). Since there’s no default clearance with a keepout they could anyway.

If you’re trying to ban the track from the keepout you need a “disallow” constraint, not a “clearance” constraint.

All that aside, it shouldn’t be giving blank errors. I’ll look in to that…

163

That wasn’t a ready to be used rule yet, I’m just trying to use the keepout as a local area (as has been instructed). Actually the blank error was the reason I posted, so that I could go on debugging.

164

Wait a second. How’s that compared to the “BGA neckdown” rule in the Syntax help? There’s condition “A.insideCourtyard” there. Then constraint “clearance ()()”. But that clearance isn’t between an item inside the courtyard and the courtyard area.