Can you explain what “lastly” means in this context?
I will try. I think the net-naming algorithm goes trough all connected nets/netlabels, collect all netlabel-strings and chooses in the end one of the available labels that is finally used for the netlist. (keep in mind I’m no developer - it’s only my imagination).
Looking to your screenshot (I remember - it’s from the kicad schematic help/documentation) you are possible right with “bug” - according to the description the power-port-priority should be higher than a normal label.
I didn’t try hard to understand the problem, but to me this looks quite clear. There’s a certain order between different kinds of labels. Between labels in the same level (e.g. two local labels, or two power pins, or…) the alphabetical order is decisive. “If there are multiple conflicting (meaning, same priority) drivers on a net, the “lowest” one alphabetically will win” as @craftyjon says in the post linked to above.
In the list by Jon global label is the most “powerful” so it overrides all other names. In the original post OP_AMP_+_2 is a global label.
In this case there are two solutions if you want to use name GND: 1. Take off the global labels and use the GND symbol. 2. Change the global label name to something else, probably adding _ would be enough, and add a new global label named GND to that net somewhere. Number 2 should work because the “lower” one in alphabetical order wins.
In this case the ‘+12V’ net name does also get changed to 'OP_AMP_+_2 ’ in PCBnew. So, maybe it isn’t a bug after all, as this is at least consistent behaviour across two tested power ports now.
Just on a side not, I did find a workaround now by simply adding a 0R resistor between the two nets. But yet the question remains if this is a bug, a discrepancy between documentation and reality or just a strange choice of what has highest priority in deciding a net name.
Just tried that but that doesn’t help. Adding the net-tie component between the two nets does separate the two nets for me. I think that might be the purpose of that symbol, although I’m not 100% sure.
I don’t understand your problem (I know it is probably my problem that I don’t understand).
If you have something connected directly to GND and want to put resistor there you move GND symbol a little and put resistor between that something and that GND symbol.
Probably you have some different basic assumptions how your schematic have to look than I.
Yes, I think you don’t understand because you are referring to an answer of mine to a suggestion of yours that doesn’t solve my problem.
My initial and still relevant problem/question is: How do I get KiCad to call my GND net actually ‘GND’ and not whatever is currently connected to it?
Imagine you are layouting a board and you look for your GND plane or ground net because some other engineer asks you a question. Maybe even better, imagine this happens in say 6 years from now. You don’t find GND because it’s not called that name. So then you go into your schematic editor and either are lucky enough to simply remember what was going on (unlikely) or go through every single schematic page and hope to find that one connection with a global label that re-named your GND net.
I can’t make friends with the idea that this is the supposed workflow.
I tried it and it doesn’t work. Net is still called ‘OP_AMP_+_2’ after adding another global label with the name ‘GND’. Also tried to connect a separate global label called ‘GND’ to GND first, then connect that global label to the other global label and it’s still never called ‘GND’.
Again, I think it makes no sense that any net can override power net names. Who wants that? If you look for ‘VCC’, ‘VDD’, ‘GND’ or whatever have you, you want to find that net on the PCB. And not figure out first which other nets are connected to GND. It’s just strange. And the KICad 6 documentation suggests it shouldn’t be that way.
I’ll open a bug for this now as it seems there is no solution and it’s not clear if it IS a bug or wrong documentation.
yes, that’s odd, here is what it does to me (v6.99) :
if i leave the GND label all is connected to GND
if i removed the GND label all is connected to GND_globallabel as it should.
well, there are other CAD that permit ‘net aliasing’, for example OrCAD.
If you ask me if is a good idea (ab)using this feature, i can answer: probably not.
It is hard to imagine to not be able to find GND net at my PCB. But I have never said that I accept to have any other net name instead of GND.
What I don’t understand is why you add second name to GND net.
I have never used (and don’t plan to do it ever) two different net names to name one net. That applies to all net names - not only GND net.
Okay, I have a clue now where all this confusion / bug talk could come from. I just swapped the schematic symbol for the cartridge connection for another symbol (a standard IDC header). Now it’s all like expected.
The other connector that seems to produce the error is actually in import from an Eagle project. So I very strongly think now that it’s that symbol’s fault.
Will investigate.
//edit:
Got too excited. New standard library connector symbol produces same error. Had forgotten that I added an extra global label called ‘GND’ and didn’ remove it when continuing to work. Will investigate anyway.
You didn’t read carefully what I wrote, or what Jon wrote.
The order is strictly deterministic, and you can’t expect that just adding a new global label works in all cases. When there are several global labels, they must be sorted somehow to find the winner, and the alphabetical order is meaningful here, but so that G loses to O.
EDIT: and by the way, I agree with Piotr:
Adding more names to one net only adds to the confusion. If you want to use a net named GND, then keep the plain GND symbol and if you want to add labels, give them all the same name. If OP_AMP_+_2 is the same as GND, why not call it GND? If the connection point between what is called OP_AMP_+_2 and the rest of GND is controlled, use a net tie.
Why not draw it like this? Hierarchical net names are not really meant for indicating a connectors pinout anyways, all though usually it’s conveniant to do it. You can indicate the pinout with text close to the connector?
