Margin or Edge.Cuts

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KiCAD treats graphic figures (lines, circles, etc) on the “Edge.Cuts” layer as the physical edge of the board. The copper fill algorithm will stop filling a filled zone when it reaches a figure on Edge.Cuts. The most recent push-and-shove router will not let a trace cross a line on Edge.Cuts. (Or so I have been told - earlier versions of P&S didn’t always honor edge cuts.)

Edge.Cuts is intended to satisfy a board manufacturer’s requirement to define the physical outline of a board. Some will ask for the Edge.Cut to be shown on Gerber files for EVERY layer; others will ask for the Edge.Cut to appear ONLY in a separate file, all by itself. (The KiCAD “Plot” menu has options that support both of these approaches.) Some board fabricators want to have all internal cutouts, slots, etc, defined on Edge.Cuts; others may want this information in a separate file.

The KiCAD “Margin” is a technical layer without a precise definition. (I want to say it’s not really defined at all, but that may not be entirely true.) Once upon a time it may have been intended to define the required set-back area from the board’s physical edge, where component outlines and/or traces are not allowed. As far as I can tell, this was never implemented and DRC seems to be totally ignorant of anything on the Margin layer. Consequently the layer is available for whatever you’d like to use it for. If you want to honor the original intent of Margin, you can use it to indicate the limits which component outlines should not cross, but you’ll have to enforce this by visual inspection - DRC will not flag any violations.

(I sometimes import a *.DXF file of my enclosure into the “Margin” layer, perhaps showing the locations of things like switches, the power cord entry, screw bosses used to hold the enclosure together, etc. This helps me visualize how my board design fits into the enclosure assembly.)

A Slick Trick: There are almost always set-back requirements related to the board edge. The board fabricator won’t put copper features (pads or traces) too close to the edge. Usually, the set-back requirement is greater than the minimum copper-to-copper spacing. KiCAD’s DRC doesn’t check for set-back per se.

But DRC (as well as the zone filling algorithm) treat a graphic line on Edge.Cuts as if it was a trace. That means they will enforce your specified spacing requirements around the Edge.Cuts line. So if your board has a general copper-to-copper spacing of, say, 10 mils but you need to maintain 25 mils of board-edge setback, then specify the graphic lines on Edge.Cuts as 30 mils wide. The fabricator (at least, any board fabricator I’ve dealt with in the last 15 years) will mill the board outline to the CENTER of the Edge.Cuts line. Half of the line width (15 mils in this example) will be inside the board edge. DRC (and the fill algorithm) will enforce another 10 mils of spacing between the Edge.Cuts line and any copper features, for a total of 25 mils between the physical board edge and any copper features.

Dale

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IIRC the Margin layer has been mentioned in the development mailing list lately. I still don’t know what it’s meant for but I had the impression it will be used some day for something more precisely defined. Personally I would avoid that layer for now and use other user layers for whatever “I would like to use it for”.

The explanation of the Edge.Cuts layer is very nice!

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Many thanks for that great explanation!

Now a further detail:
ofcourse fiducials are to be placed inside Edge.Cuts.
But layer alignment targets may be placed outside Edge.Cuts ?
Is that true ?

Regards

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I am new to KiCad (before my first PCB).
I have another question about Edge.Cuts.
Why in footprint editor I can’t use Edge.Cut (some layers are grayed and can’t be selected)?
I am planning to make trafo by hand during PCB assembly (2 turns : 3 turns on 12mm diameter toroid) and I would like to put toroid vertically in a rectangle (rounded corners) whole in PCB. It would be easier if designed whole follow the footprint placement.
I can imagine other needs to have whole defined with footprint - for example in hi voltage separation elements.

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There are several reasons you might use fiducials and depending on the reason they may be inside the board outline (edge cuts) or outside of the board outline.

Layer alignment targets are almost always outside the board outline. I have seen them placed inside the board outline but it is very amateurish, the layer alignment targets end up on all copper layers as well as in the solder mask and printed on the silk screen, not very professional looking at all.

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I don’t know “why” you are not allowed to edit the Edge.Cuts layer in Footprint Editor. There are two workarounds. I don’t like either one of them, but you can evaluate them for yourself by looking at the thread " High Voltage Footprints with PCB Cutouts ".

Dale

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The reasoning given by wayne is that it is quite hard to get a closed (continuous) polygon when part of the board outline is inside a footprint. (It would require snapping to line ends to make this workflow easily doable.)

more details see this bug report: https://bugs.launchpad.net/kicad/+bug/1251393

More details about layers and the restrictions in the footprint editor see this faq post: What is the meaning of the layers in pcb_new and in the footprint editor?

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For almost anything but a simple rectangle it is just as difficult to get a closed polygon on the Edge.Cuts layer in PCBNew. That is why I do many of my board outlines in a separate CAD program, where I have tools for, e.g., snap-to-ends, place a line tangent to an arc, join intersecting lines with an arc, etc. Then I import the outline to Edge.Cuts as a *.DXF file.

Dale

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True, but it doesn’t seem that would be an issue if the entire polygon was in the footprint. (This would be the case for a cutout, and it could even be the case for the exterior board outline if there is a footprint for a standard form factor like an Arduino shield or Pi HAT.)

Yeah, I wish PCBNew treated a polygon as a single object, instead of a bunch of unrelated line segments. I’d like to be able to drag corners or edges of a board outline, the same way I can drag corners or edges of a filled zone.

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There I see:

Edge.cuts: This layer is used to communicate with the manufacturer what the final board shape should look like.

  • The edge-cut is must not contain self intersections
  • Polygons on the edge-cut must be continuous and closed.

Can you tell me where from is the need that Polygons must be continuous and closed as it is only used to communicate with manuacturer?
What is the problem if the lines are little intersected at their ends.
Using my old Protel 3 I have recently designed the PCB being generally the circle, but with 3 hollows (word from dictionary - not sure of meaning). Each of hollows where constructed from 3 arcs so the total edge-cut was a set of 12 arcs. As I define them by center+radius+start/end angle their endpoints certainly were not perfectly at the same points. I’ve done them to have little intersection to not left gaps.
Manufacturer we ordered prototypes had no problem with it. Contract manufacturer who orders PCB from some other manufacturer also reported no problems.
I didn’t started PCB under KiCad yet. Where, with what and why I will fall in trouble if I make edge-cut in KiCad that way?

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I relayed the information as it was given by the developers. I assume they know about problems that we mere mortals will never encounter.

You can comment on the bugreport and ask for clarification in this regard.

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I will not do that until I will have some experience with KiCad. It is not good if someone knowing nothing about something has too much to say.

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It’s a general recommendation. As for most other things regarding gerbers and communication between you and the manufacturer, it depends on the manufacturer. Having closed lines is always safe and a good practice, but I believe most manufacturers can live with non-contiguous edge lines (with small tolerances, that is, not like 1mm gaps!). It’s very annoying that KiCad can’t always do them correctly and for many users it’s too much to learn and use an external mechanical CAD program to draw lines.

For more “authoritative” reference see The Gerber Guide (chapter 3), https://www.ucamco.com/files/downloads/file/184/the_gerber_guide.pdf. But don’t believe everything they say!

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I understand users for whom it is too much to learn.
About a year ago I spend some time learning LibreCAD ended with my one simple mechanical drawing I needed that time. I like some solutions (compared to OpenOffice Drow I used before), I had to find how to solve some problems. Fortunatelly people at forum told me workarounds.
An year passed and I needed next simple drawing - I found I remember a little - I need to learn once more.
I wonted to learn Inkscape (just for myself). During 6 months (using any free time) I studied the whole Inkspace tutorial and when I tried to do anything myself I found that I have problems with the basic things. If you collect everything you should learn then no time for work lefts…
I have also decided I should learn C#. I hope I will not have to learn Python (for KiCad) but I didn’t get to BOM in KiCad yet - we will see.

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I believe KiCad has some features (that I haven’t used) that depend on KiCad knowing what’s “inside” the outline and what’s “outside” the outline. (e. g. “Spread out Footprints not already on Board”, or “Automatically place all Footprints”) In order for KiCad to find the “inside”, the outline must be closed.

With PCB manufacturers, it probably depends on how automated the process is. If the manufacturer is manually reviewing the order, they can probably fix up little problems like this. But a fully automated system like OSH Park requires that the board outline be “watertight”:

oshpark-board-outline
oshpark-board-outline884×557 56.4 KB

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I’d like to know with how precision it must be closed.
I have read here that a good way is to design complicated outlines outside and import to KiCad. In such programs there are possibilities to automatically cut too long parts of lines (including circles (elipses)). But even after are they perfectly, continuously closed, and do position resolution in KiCad is the same or better to assure that continuous outline imported is still continuous.
If it would be said:

  • if separation betwean pouring and outline you set to x than a gap in outline less then 2x is no problem, or
  • the max allowed gap is 0.0001mm, or
  • a little longer lines are no problem.

then I would know how to define outline made by circles.
I can’t check if something is (can be) the problem because I don’t know if it is only a question of pouring.

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According to this mailing list conversation it has a tolerance of 0.01mm (External tools like kicad stepup are not so tolerant. This might change in the future. -> might be best to create boards with closed polygons.)

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Do you meen replace circuits with a set of line segments?
I didn’t thought about such possibility :slight_smile:

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Not circuits but circles.

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for complex pcb outline you may have a look at this

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