Although this is an older thread it recently appeared at the top of my page due to new activity. Having finally got around to reading it I was flabbergasted by one of the posts I read. Since this is off-topic I hesitate to reply but I post this for any future readers. I also apologize for the long post.
Now this advise might not be that bad if it was in the context of audio signals but the author was also talking about BGAs so I am assuming it was intended for digital applications. No reasonably competent EE would ever give such advise but worse still is that not only did no one question this but there were additional posts agreeing with this advise.
There was not a single objection to the above advise which goes against everything ever written in any book or manufacturer's application notes. Rather perplexing!!
A capacitor's parasitic inductance (ESL) is primarily a function of the package geometry as well as it's internal construction. While the ESL will vary slightly between manufacturers this variation is not that significant. The values below are obtained from measurements made by AVX.
ESL for MLCC
SRF for 1uF MLCC
ESL for LICC (Low Inductance Ceramic Capacitor also known as Reverse Geometry Capacitor)
SRF for 1uF LICC
SRFs for other capacitance values
100nF 0603 MLCC = 19.0MHz
10nF 0603 MLCC = 60.2MHz
1nF 0603 MLCC = 190.2MHz
100nF 0306 LICC = 49.1MHz
10nF 0306 LICC = 155.3MHz
1nF 0306 LICC = 491.2MHz
Lower values of ESL are available with inter-digitated capacitors around 50pH in an 0508 package and LICA (Low Inductance Chip Array) capacitors getting down to 25pH.
Of course non of this matters if the PCB hasn't been laid out to minimize inductance in places where it matters anyway.
When it comes to high speed digital designs you probably shouldn't be using capacitance values of 100n or even 10n for decoupling anyways. The days of the "one size fits all" 100n decoupling capacitor are long gone.