KiCad Edge Cuts rejected by JLCPCB

Yes, but that’s a hack, a workaround for not having proper edge/copper clearance. In 5.99 there’s a board setting for clearance.


That’s good to hear. I was wondering if that would get “fixed”.

@eelik Thanks!

There is a certain company that actually charges more for boards created with KiCad that have a thicker Edge_Cuts line width. I do not believe there is anything not above board with the service, and do believe it is just how the machines on the other end tend to do the work with the current stable KiCad files.

On Edit: I exported a .dxf of the edge cut layers created by version 5.1.5 and uploaded it into FreeCad and found that it did in fact contain 2 Edge_Cut outlines; a smaller outline inside the larger outer outline. I did not do any further testing.

Thicker than what width?

The reason why the edge cut layer is made out of lines is because that way it’s much easier to combine multiple graphical objects to form an outline. There are for examples edge cut layers on some edge connector footprints.

You could of course overlay multiple solid shapes on top of each other, but kicad would need to turn that into an outline anyway as manufacturers expect that. So better just directly create the outline.

Don’t know, did not think to push the limits of the question.

Anything over 1 mils was more expensive. Until you asked, I never thought to try 0.5 mils; and KiCad accepts it as valid. I do not know if 0.5 mils is less expensive than 1.0 mils.

Do realize that KiCad pulls the copper back by half of the edge cut layer to keep the edges from having exposed copper. I don’t know if the board house is tweaking this, but my 1 mils edge cut line width boards have not had edge copper exposed after manufacture.

*“Do realize that KiCad pulls the copper back by half of the edge cut layer to keep the edges from having exposed copper.”
I don’t think that’s true for pours.

Yes it is. Zones (aka Copper pours) treat the lines on Edge.Cuts just as if they were copper tracks for calculating their clearance.

I never draw Zones to near the lines of Edge.Cuts. I normally draw the zone outline itself in some weird shape (Such as a pentagon) far outside the PCB outline, and then use this feature to clip the zones from Edge.Cuts.

The Pentagon also has an important feature. If the Zones do not get clipped properly for whatever reason, and the Pentagon flood fills, then it is immediately clear there is something wrong when you inspect the Gerbers.

The reason some manufacturers charge extra is probably because they have some old software that does not accept wide lines for Edge.Cuts and it needs manual intervention to modify the Gerbers before they’re sent to the machine. 1mil is small enough to be ignored for PCB manufacturing and may be a hard limit of what the old Gerber plotter accepts.

@dotneck335 Well, here is 1 mils edge line width next to 20 mils edge width screen-grabs.

I did this really quick, the screen-grabs are not centered and scaled the same.

However, anyone can try this and it becomes obvious that the V5.1.5 version of KiCad does use half the line width of the Edge_Cuts layer to both subtract the inner copper and also expand the outer actual edge cut.

It’s even more obvious if two lines on Edge.Cuts are collinear.

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Interesting—I took a look at a board from jclpcb that I had made several months ago. Not using it because of some changes I made; but that one WAS manufactured from Edge Cuts done with ‘Zone’ and it has the pour going ALL the way to the edge. My newer boards do NOT, as you said.

@dotneck335 No worries!

KiCad (nightlies especially) and board manufactures change things from time to time.

Hope I helped.

Thanks all, this is helpful. But still, it is all folk lore and rumors on “how this are supposed to be.” Fabricators use the center line. But it could be the inner our outer line. Is there a specification or guarantee, and legal commitment that they will use the center line? Is there a specification about this somewhere? Or is it indeed all just folk lore, rumors and commercial good will.
It is strange that such a basic element of the PCB design must even be discussed.

Ucamco is a manufacturer for photoplotters and as far as I know also the big bos concerning the Gerber Format itself.

But the problem is that the Gerber format is an very old format and there is no guarantee how old (obsolete) the machines are on which your PCB actually gets manufactured. I’ve got some memories (30 years old or so) of a DOS program (UltiBoard) which had 50 or so different “printer drivers” for generating gerber-like format files.

If you want to have some “guarantee” then you have to look at the websites of specific manufacturers or make them sign a contract.

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The fabricator never uses your data directly on his machines, he has to panelize and apply compensations. He reads your data into his CAM system and the generates machine output himself. So the question is what the CAM system likes. This does not invalidate your point because there is plenty of different and often antiquated CAM software around, each with its own quirks.
Gerber spec is a good point too. I had a look and, lo and behold, section 6.1.5 specifies the outline. Alas, it is rather vague. Folk lore and rumors… The only thing that is clear is that the outline must be in a separate layer. They prefer a filled outline, but seem to be OK with anything that is clean.

As far as I can see paulvdh is correct. Gerber in its current form is actually pretty advanced and standardized; the problem is that no one can force any implementations to interpret it in a certain way, especially old implementations. No one can force anyone to upgrade their software. And most of the software seems to be outdated and/or buggy (as we can see with the other jlcpcb issue, with certain kinds of pads, and jlcpcb isn’t alone there).

Read (ch. 3 covers the outline). If you read between the lines you may see how Ucamco tries to do its best to make people use the standard in a certain way and at the same time tries to give a better impression of the situation than what is the reality. It’s easy to say how things should be done while they are actually done in another way.

Hmm. Yes, indeed. But how can we progress towards a more standardized data transfer so that we do not need meta-physical discussions how outlines ‘are supposed to be?’ Shouldn’t the standard developer say how things should be done? And if it is easy for them, so much the better.

Switch to ODB++ ?

and a bit of garbage at the end to satisfy the 20 characters *&^%$#@!

A sledgehammer to kill a fly, IMHO. Surely it is easier to write a clean outline in Gerber than using another format, where the same problems of old buggy software exist, and no way to force fabricators clean out their act.

Well that’s the thing about standards… there is soo many. Likewise if there is even a smidgen of wiggleroom in an interpretation then sods law will mean you don’t get what you expect.

ipc-2581 will help close this gap but I will still provide the additional information (dxf, x-y dimension …) to my chosen fabhouse to ensure there is multiple cross-linked pieces of information to remove all ambiguity…

If I provide an edge-cut with a linewidth of 1mm but I also state the dimension of the card are 10x10mm (in the GERBER mech layer and in the datapack), the fabhouse should be able to interpret that to not produce a 9x9mm card (centreline not edgeline)

The centreline also makes sense because it is context boundary of your product. They could use whatever routing bit and thus they can move their CNC centreline to take account for the radius of the bit. Now if you panalise :slight_smile: