KiCad and ODB++

In Fabrication Output selection, one is Pos file
Does that file contain coordinates of all parts in the gerber output? Is that in a format a Pick n Place machine can use for accurate and exact placement?
If so , one does not need any other stuff.

Gerber is just a photo plotter driver
The POS file contains part position and orientation
My experience is that all manufacturing formats require intervention because the reeling is so inconsistent on defining pin 1 rotation

thnx for pointing this out. Any tricks you know to make the intervention consistent &/or systematic? Any instructions one can give to part vendor to make reels consistent?

Actually, since many years Gerber is no longer just a photo plotter driver but contains full fabrication data. This is perfectly supported in KiCad. The latest version, Gerber X3, contains full component date. X3 is already implemented in the nightly builds.

I can’t find it … I see only Gerber X2 on Plotting…

Maybe it is name confusion. X3 actually uses X2 syntax, but defines two new layers, top and bottom component, with appropriate attributes. Syntactically it is X2. The new is the component layer. The spec is somewhere on the Ucamco website.

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@maui: If your venerable StepUP script could export STEP models of the pcb, including all vias and internal traces (not just outer copper patterns), it would be a huge step forward. But that would probably require the user to input information about the thickness of each dielectric layer and the copper traces.

The issue I am facing at the moment is the simulation of of a Ku band antenna array for satcom. It is possible to establish waveguides on the pcb with via fencing. The waveguides can be horizontal (don’t confuse them with coplanar waveguides) or even vertical, from one layer to another, in which case the waveguide is defined by via fencing forming a closed structure across layers. You may google for “SIW” or “substrate integrated waveguide.” So, I would need to export all 3D characteristics of the pcb to a full 3D electromagnetics simulator (HFSS in my case, unfortunately).

To get an idea of SIW you may take a quick look here: Observe how the vias there “soft-define” a vertical cavity (with “horizontal” defined as “parallel to the pcb layers”). The antenna in this article is basically a cavity-backed SIW slot antenna.

This need certainly stretches the capabilities of many pcb tool chains because so far the prevailing thinking of pcb layout has been 2D or 2½D at best.

I’m not sure that your antenna modelling export requirement is directly a feature of OBD++ or not but it is possible to export models that include vias and geometrically accurate board models for FEM using some 3rd party programs. I believe that these will work with openEMS (ymmv with other simulators).

It might be better to move this to a new thread if the step model generation isn’t a specific feature of ODB++.

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fcad_pcb is a very good option… StepUp internal parser is based on it.
You can have some tips on how to use it here:

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Apropos of the forum software, it seems to have a strange idea of “1 month later” between the posts of Frederik and cflin. Maybe it would rather forget the disastrous year between April 2019 and April 2020. :wink:

Mar 19 means 19th of March, not March 2019. Mar '19 would mean March 2019. Confusing? Yes, at least for those who don’t live in US. I would prefer for example ISO format and full year.

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Ah, ok stiffed by those confusing US dates again.

@John_Pateman and @maui:

I am evaluating the use of KiCAD vs. Cadence’s OrCAD/Allegro in a corporate environment. So, the use of HFSS is a given… Regarding the two other scripts (besides the pcbmodelgen, which I am not sure works very well because I’ve tried it in the past, but things do change), I would also need to import the dielectric layers in addition to the metal structures.

OBD++ export would be nice, but that is a potential (not certain!) feature of KiCAD6, which is ways off. That is my understanding at least. So, I am not sure this discussion warrants a new thread.

Thank you both for your responses. At the very least, I think this discussion helps keep KiCAD at the cutting edge of modern pcb development.

KiCad currently does not support pcb stackup info. So fcad_pcb would need to get this info from somewhere else. But the author (realthunder) is really supportive and responds to reported issues quite quickly so you should try requesting the pcb stackup info importing.

I think there was some discussion that V6 would support pcb stackup info. Does anybody knows if this is true? Is it already implemented in 5.99? If it is then I assume that realthunder would not object to implementing parsing this info.


I read that it is now a V7 thing, so years away.

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Yes. Post-v5 new features and development news

EDIT: ODB support was moved to the Future roadmap from v6 roadmap. Seth was/is working on it. (EDIT on EDIT: not ODB per se, but IPC-2581 (see #1954)).


Thanks eelik. So the board stackup info is already present in 5.99 layout files. So @cflin if you do ask for fcad_pcb to support board stackup it would make sense if it would parse the 5.99 layout files for the info.

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Thank you all for the info.

I have another question. We have discussed the workflow from KiCAD to a 3D electromagnetics simulator. How about the reverse? Very frequently, you can optimize in the 3D electromagnetics simulator and then you export the optimized layout to the ecad program. A 2D export, say of DXFs of traces, would not be a problem, but what if vias are also involved, making the export to ecad essentially 3D? If the vias are through-hole only, things may not be that bad; you can just export the 2D of each layer and then place the vias by hand where their cross sections are shown in the 2D file. But if the vias are blind or buried, then it is still possible, but tedious. KiCAD6 with its padstack may ease the pain, but for now, we have KiCAD5. Any ideas?

Seeing how FreeCad is the way to go from KiCad to .step, maybe @maui might have an idea. His StepUp plugin supports bidirectional flow for footprints and edge cuts. The plugin might be possible to extend the bidirectional flow for vias also.

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