How to define tented and not tented vias

Hello,
how do I configure if a via should be covered with solder mask (tented)? I found a topic that says you can choose while exporting Gerbers, but I would like to define it on a per-via level. For example, if a have a via inside a pad I do not want it to have soldermask on the other side, but normal vias should be tented.
How do I do that?
Best regards
Stefan

“Tenting” isn’t a specific option in KiCad. Vias are covered by soldermask by default, i.e. there are no round graphic items on them in the Mask layer. By default the gerbers are created accordingly. You can choose to uncover all vias when exporting the gerbers.

You don’t need to do anything special for vias placed inside pads. Pads have (should have) their solder mask layer graphics which create holes in the physical board mask, and the vias inside them are also without mask automatically. It’s not possible to cover anything with mask in KiCad in any other way than changing the visible graphics in the Mask layers. What you see is what you get, except the possibility to uncover all vias when exporting.

You may also want to read How does solder mask layer work?.

Two other tips: “tenting” option when you deal with board manufacturers may have another meaning, namely extra mask applied on vias on top of the normal mask. And “via in pad” is a special technology, a microvia which is plugged or tented with some substance so that the solder doesn’t go into the hole. A prototype board with “via in pad” will cost maybe 10x the normal cheap. You can use normal vias inside pads without worried, but they work reliably only for manual soldering. In machine assembly/soldering via holes may drain too much solder paste and make the joint unreliable.

I use “via in pad” a lot, using Eagle this was never an issue (there is a checkbox in the properties to enable/disable solder mask). Why should that be more expensive? It’s not different than any non-SMD pad. Of course, if you want to have the via plugged to allow easy reflow soldering, that’s different. By I do not need that.
If the via is a pad on both sides, no issues, but if it’s only half in pad or only on one side, that’s bad. I do not want any soldermask in the via.
I manged by manually drawing in the mask layer, not the best solution, but it works. Would still be a great feature to be able to define if the stop layer should cover a via or not.

My experience is that 0.3 mm via in pad holes don’t have to be plugged.
Any larger and solder theft becomes an issue

If I understand correctly, your only problem is to get the via uncovered from the other side than the SMD pad. This would probably be covered by (sorry for the pun) True padstacks and via stacks with differing geometries on different layers (lp:#1827233) (#2402) · Issues · KiCad / KiCad Source Code / kicad · GitLab. You can try to read through all the related requests and find out if your specific need is already there. Otherwise you can give a comment there.

The feature wish is already highly popular, but you can vote for it by giving a thumb up.

Another workaround is to create a through hole footprint and use it instead of a via.

No, that would mean that specifically design a footprint to be like that. All I want is to have a via in a pad of for example a SMD resistor, with no soldermask on the other side.

I can’t run KiCad here now.
Can you (during PCB design) add single pad footprint instead of via? I don’t know if it is possible to add it to net you want and then update schematic with info from PCB (I have never tried this direction).
If it is not possible the other solution could be to add such pads at schematic.
But at that moment I suppose the best could be to define footprint containing only solder mask openings and place it additionally on such vias. Having no pad it need not to be connected to net so should not generate any schematic-PCB problems. Only when moving that via you have to separately move that footprint. But I didn’t tried it.

because board manufacturers usually don’t just put soldermask over your via and hope it does not flow through the via. instead they fill (or plug) the whole via. as this is an additional manufacturing step, this obviously increases the costs of the manufacturing process.

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