Hi all,
I’d like to create pads as plated half-holes at the edge of my pcb, just like described here:
https://www.multi-circuit-boards.eu/en/pcb-design-aid/drills-throughplating/plated-half-holes.html
Is there a way to achieve this without too much fuzz? I saw no regular way to have a circular pad done only half way. Putting one on the edge will most probably sound alarms on both KiCad and the manufacturers side…
Help would be much apreciated!
The therm you are looking for is castelation.
Not all manufacturers support it. But if yours does simply place a normal through hole pad at the edge of the board. A detailed explanation can be found at in this post: Making a PCB gap / slot / milling / routing
Like Rene said. You can consult your manufacturer. I asked mine and they told just to put a hole on the edge, they understand it to be castellation. (With two l’s, by the way.) They wanted minimum hole size of 0.6mm. I have made a footprint which has trough-hole pads and then rectangle pads attached to them, as you see in castellated pcbs. But it’s not been manufactured yet - hopefully it will be okay. Here it is:
(module Castellated_15row (layer F.Cu) (tedit 5AD71285)
(fp_text reference REF** (at -0.05 2) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Castellated_15row_0.6mmHole_P0.5in (at 0.05 -1.4) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 8 thru_hole circle (at 0 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 8 smd rect (at 0 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 7 thru_hole circle (at 1.27 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 7 smd rect (at 1.27 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 6 smd rect (at 2.54 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 6 thru_hole circle (at 2.54 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 5 smd rect (at 3.81 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 5 thru_hole circle (at 3.81 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 4 smd rect (at 5.08 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 4 thru_hole circle (at 5.08 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 3 smd rect (at 6.35 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 3 thru_hole circle (at 6.35 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 2 smd rect (at 7.62 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 2 thru_hole circle (at 7.62 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 9 smd rect (at -1.27 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 9 thru_hole circle (at -1.27 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 10 smd rect (at -2.54 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 10 thru_hole circle (at -2.54 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 11 smd rect (at -3.81 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 11 thru_hole circle (at -3.81 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 12 smd rect (at -5.08 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 12 thru_hole circle (at -5.08 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 13 smd rect (at -6.35 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 13 thru_hole circle (at -6.35 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 14 smd rect (at -7.62 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 14 thru_hole circle (at -7.62 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 15 smd rect (at -8.89 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 15 thru_hole circle (at -8.89 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 1 smd rect (at 8.89 0.225) (size 1 0.45) (layers F.Cu F.Mask))
(pad 1 thru_hole circle (at 8.89 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
(clearance 0.001))
(pad 8 smd rect (at 0.002508 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 7 smd rect (at 1.272508 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 6 smd rect (at 2.542508 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 5 smd rect (at 3.812508 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 4 smd rect (at 5.082508 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 3 smd rect (at 6.352508 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 2 smd rect (at 7.622508 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 9 smd rect (at -1.267492 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 10 smd rect (at -2.537492 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 11 smd rect (at -3.807492 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 12 smd rect (at -5.077492 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 13 smd rect (at -6.347492 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 14 smd rect (at -7.617492 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 15 smd rect (at -8.887492 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 1 smd rect (at 8.892508 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
(pad 15 smd roundrect (at -8.89 0.45) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 14 smd roundrect (at -7.62 0.45) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 13 smd roundrect (at -6.35 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 12 smd roundrect (at -5.08 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 11 smd roundrect (at -3.81 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 10 smd roundrect (at -2.54 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 9 smd roundrect (at -1.27 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 8 smd roundrect (at 0 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 7 smd roundrect (at 1.27 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 6 smd roundrect (at 2.54 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 5 smd roundrect (at 3.81 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 4 smd roundrect (at 5.08 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 3 smd roundrect (at 6.35 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 2 smd roundrect (at 7.62 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
(pad 1 smd roundrect (at 8.89 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))
)That’s exactly what you do.
It only sounds alarms if you forget to tell them you want those ‘half holes’ 
You might want to include a via in from the edge slightly, if there is room, so you do not rely on the outermost plating. That edge plating has to cope with the stress of the milling cut, and any mounting flex too…
Thanks for the fast help everybody!
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