Our board vendor complained about our soldermask Gerber layers. I’m hoping to find how I can change the behavior but have not yet found a dialog box that allows me to make changes. Can a seasoned expert please point me in the right direction?
The complaint:
“…[please] output flashed pads or lines for the mask layers, not exterior polygons…” (In the pic, blue is copper, magenta is soldermask.)
See How does solder mask layer work?.
I don’t believe it’s really about flashes vs. polygons. Maybe they want to set the mask clearance themselves. It can be set to 0 and minimum width to 0. But I don’t guarantee it works in all cases. If you have time and patience you can try to ask them what they really want and why.
I think they mean these are points that lack solder mask and will potentially ‘flash over’ (short) during the soldering process. So the zero clearance seems to be the way to go. That’s my guess anyhow.
HOWEVER, if that’s the way you want it, see if you can tell them you are aware of that issue and just want it made the way it is submitted.
Zero is the worst clearance value. It should be either a negative value (mask defined pad) or a positive value (copper defined pad). If you have zero clearance then you get the case where the mask cutout coincides with the corner of the pad (with high likelihood). This is the worst possible option as it increases the chance of delamination.
You might want to tent your vias as this will already solve at least one of the issues. (keep vias covered with mask)
The other issue is something that you need to decide if you can live with it. To me this looks like one pad of a passive very close to a gull wing part. If that is the case then you will find that you will have a hard time to solder this (because you do not have enough space for a soldering iron) The fact that the mask is strange at that place should not in itself be a problem (there is no risk for a short as the “short” is already there in copper)
Making the pads rounded rectangle pads will also reduce the problems you see. (IPC suggests 25% round radius with a maximum radius of 0.25mm)
It is, if it actually goes to production. But some manufacturers want zero clearance in your gerbers and they set it themselves to best fit their manufacturing process so that it will be as small as possible while ensuring no mask edge covers pad edge. Just find out and follow their recommendation.
Many manufacturers recommend 0.15mm or 0.1mm for the minimum web/bridge/dam width. Sometimes that may be too large for tight designs. If all the parts are soldered with iron it should be safe to set the minimum width even to 0 because the possible loose strips of mask shouldn’t matter for the process.
@kc64, how does the gerber look like if you set the clearance to e.g. 0.051 (which is some industry recommendation, I don’t remember where I saw it) and minimum width to 0.15?
I personally do not like it if i have no control over things like that. I see gerber as the specification of a product. If they change something in it without me in the loop then this is a breach of contract and i feel entitled for a refund (Fast track reproduction with overnight delivery at their cost to be precise). This is something i could not do if i leave them the freedoms you mention. (In that case i have no specification to check the product against.)
The same holds true when sending kicad files instead of gerber (or any other ecad native format).
Both might be tempting options for inexperienced users (or if your product is not critical, very far away from the manufacturers capabilities) but be aware what the downside of this is! (And if you make it as a suggestion to somebody then list the downsides as they might not be aware of them.)
@eelik:
You are correct about setting the Solder mask minimum width to 0. If it is non-zero, KiCAD 5.1.2 makes polygons from touching features like this.
If you set the minimum width to 0, you get “flashed pads” with tool codes. like this:
I will be setting minimum width to 0 for all my future work.
Why would you want this? @Rene_Poschl has some strong opinions about it which I understand but the board house must have flexibility to adjust things to make the result come out the way that you want. They cannot adjust a polygon margin but they can adjust the flashed pads in order that the result is exactly what you requested.
@Rene_Poschl : another point to consider is that when you specify a 10mil drill, they don’t use a 10mil drill bit. Rather, they calculate how much copper will build up in the via, add that to the diameter of the drill bit, make the hole oversized, plate the board and fill in the vias, ending with a finished hole size that is the diameter that you requested. These types of adjustments are made all the time in order to satisfy the customer. I think they use domain-specific knowledge that most of us don’t know or care about in order to get as close to what we want as possible. I’m content with that and don’t consider it a breach of contract. I hope this helps.
By setting the clearance (or min width) to zero you tell the manufacturer “i don’t care” (or they assume you made a mistake in setting up your software in which case i would hope they request clarification).
If your intention is anything different from that then you do not tell the manufacturer what you want. Which means it is impossible for them to make what you want.
Just to reiterate: it is fully OK to set these values to 0 but simply be aware what that means. You are the only person who can know if your application can live with the consequences of setting it to 0.
The example of the hole size is very bad in this regard. Most manufacturers (and possibly even industry standards) tell us that the size in the drill file is the requested nominal size of the final hole (after plating for plated holes). The manufacturer tells you a list of available final hole sizes with the respective tolerances. The manufacturer is responsible to account for the plating process. Both for determining the required drill and of course when calculating the expected tolerances.
If you then get a board back with a hole size outside the specified tolerances then you can do something about that (request compensation). If you however do not specify the mask clearance then you can not do anything if you get something unexpected back.
We just have to be careful now about the terminology. Minimum width is very different than clearance. Setting minimum width to 0 doesn’t take control over things from you. Setting clearance to 0 may do that if the manufacturer interprets as “I don’t care, do whatever you like”.
It’s interesting if changing minimum width really affects the gerber files so that the gerber objects change from polygons to simple flashes.
Edit: misunderstood the quoted statement. I doubt the fact that one gets polygons has anything to do with what is observed (reported by the manufacturer).
Minimum width is applied after clearance and removes mask features smaller than that. Increasing the minimum width will of course mean some additional features are removed from gerbers. (possibly increasing the complexity of the gerber maskfile) Or the other way round: decreasing it will keep some areas that would otherwise be removed (remember the mask layer shows the cutouts.)
However, if you set it smaller than the manufacturer can handle then i would guess that they either ask if you made a mistake (best case) or simply do the removal in their software with a similar algorithm as used by kicad. This means that all you get is a “clean” looking gerber by setting it to a low value but still get the same result as if you had set the minimum width to the correct value from the get go. (so instead of having a chance to notice problems in gerber you will only notice it when receiving the pcb)
Second edit reason: confused increased vs decreased results for min width
That should be tested. I don’t take is as probable, either, while it could be logical that setting the clearance to 0 would do that (because they could be flashed with the same shape than the pad itself). That’s why I said we have to be careful about the terminology.
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