Failed PCB, can somebody explain solder masks to me?

I ordered a copperless PCB which just had to look pritty. I ordered a red PCB and nice white silk texts

This is the previewer of the manufactorer.
afbeelding

This is the previewer of my camera app :see_no_evil:

I don’t understand if the previewer of the manufactorer shows a nice red pcb with white texts that they still manage to do this

I don’t why exactly but, I deleted the source board file for this one. I downloaded and attached the altered gerbers.

As usual with copperless board, I get mail from JLC that they don’t understand my design. I told them to proceed with my gerbers.
GERBER-front panel(1).zip (111.6 KB)

If I recall correctly I added a solder mask zone. But now I am not sure anymore whether I should add a zone at all. Doesn’t the mask ‘mask’ the pcb preventing the solder mask from being applied?

I found a similar future dissapointment (PCB is in transit)

Can somebody explicitly tell me what to do to prevent these screwups in the future?

If you’ll excuse me now. I must figure out how to use our cameo plotter and make me some red stickers :smiling_face_with_tear:

Bas

I suspect you got what you asked for . . . solder mask is Solder resist mask, i.e. where the solder resist doesn’t go . . .

See this: Solder Mask cover at via - #3 by RaptorUK

Yeah me too, let’s not click on the quality complaint button today and just try again :sweat_smile:

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The strange thing is the silkscreen layers in your zip file contain no text. Here are the lines starting with G04 in your front silkscreen:

G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 7.0.6) date 2023-08-14 16:49:52*
G04 APERTURE LIST*
G04 APERTURE END LIST*

and here are mine, truncated:

G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 6.0.9) date 2022-12-12 22:50:19*
G04 APERTURE LIST*
G04 APERTURE END LIST*
G04 #@! TO.C,J2*
G04 #@! TO.C,C11*
G04 #@! TO.C,D4*
G04 #@! TO.C,U21*
G04 #@! TO.C,J11*

So something went awry between the preview and what you submitted.

I also cannot see any text in gerbview, gerbv, and the online tracespace.io viewer.

Although looking at my lines, those are comments. Did you turn off X2 extensions when generating gerbers? Many cheap fabs can’t handle them.

You and Raptor are right, you made a negative… It’s covered here (sorry for the pun): How does solder mask layer work?

Yeah, found via raptor’s link, thnx. Good explanation :+1:t2:

Yeah when I said go ahead with me gerbers. They have changed it. If an entire pcb is without solder mask, you don’t need silk anymore, right?

Weird thing is . . . I don’t see anything on the Silk layers in the Gerbers you posted (using KiCad Gerber viewer).

I don’t have the originals anymore. But trust me… there was silk in them…

I already had similar issue with JLCPCB. But they did contact me before.
When you order of Copper less PCB, you must specify to the manufacturer if you want the solder mask or not. Because the solder mask file will be empty. SO then are not sure if you want full solder mask or empty solder mask.

I’ll take a new crack at it tonight

Oshpark also has some notes about this. (They call it a “stop mask”)

https://docs.oshpark.com/troubleshooting/one-layer-pcbs/

This is weird to me:

When a project is send to a PCB fab, I always make a backup of the project state as it was on the day I send the files to the fab, and I archive that version together with the generated gerbers. It is maybe 5 minutes work, storage space is cheap, and it can help with identifying problems.

And also, I can’t blame JLC for removing the silkscreen too. It is quite common that PCB manufactures subtract the solder mask from the Silkscreen layer, as most people do not want silkscreen printed on pads.

But there are two ways to think about this. Some people like the PCB manufacturer looking over their shoulders and appreciate input from their experience. Other people just want their boards manufactured exactly according to the gerbers they send and don’t appreciate the extra delays.

PCB manufacturers do other (semi random?) modifications too. For example Aisler states:

Pad Shrinking

As we will take care of shrinking the SMD pads, the actual drawing should have no pad shrinking. Otherwise it’ll double. We shrink the pads by 15% in volume.

Source: https://community.aisler.net/t/prototype-stencil-specifications/43

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