Seems that I stumbled my way through the process and have an understanding now how the system works.
However I still think it’s a bit tedious and there are things that I can’t seem to accomplish.
One such example is having multiple pads for the same signal on a part.
In other words I don’t see all the pads on the same net in the layout.
I did figure out how to create my own library and I did so per project, it’d be nice if you could import the global library that is created into a project.
Here is the issue with the pads.
I currently have to go in and change each to the net that their associated with.
All of these pads belong to the same part on the same signal line.
With the image, I hope that it’s easier to see what I mean when I say I’m wondering where or how you can associate all the pads in the footprint layout.
What, specifically are you trying to accomplish here? Am I correct that you want to use via stitching to connect a bottom pad of an IC to copper on both sides of the board for thermal and/or current capacity reasons? Do you have a datasheet that we might look at so we can help understand what you want/need?
A general comment. You can have multiple pads in KiCad footprints that all have the same pin number. If they are overlapping enough then they will be considered connected to each other. So if (as I suspect you are trying to do, but I could be wrong) you want to connect a SMT pad under an IC to both sides of the board, you can have in the footprint a collection of pads all the same pin number. A large SMT pad covering the entire area, then several small drill (via sized) THT pads (pad shape doesn’t matter) within that larger SMT pad. I’d be careful soldering that sort of arrangement (unless you can communicate with your board house that those holes are to be filled vias) as all the vias would absorb solder paste like a sponge.
Aren’t you using a schematic?
There is no need to set the net name of a pad in the footprint editor. The pads in the layout take the net name from the schematic/netlist.
Yeah, make all of the pins pin number 1. Put two SMT pads (copper only, no solder mask or solder paste), one on the top and one on the bottom, both also as pin 1 to connect them all so you don’t have to run traces between all the pins. On the schematic just use a single pin symbol as pin 1, and connect that pin to your desired net.
Try this footprint (you may want to rename it…): dummy.kicad_mod (2.8 KB)
Note, I haven’t tested this on a PCB yet.
Oh, I just realized that my sample footprint name might be taken as insulting. That wasn’t the intention. I used the word “dummy” with the following meaning: a prototype or mock-up, not as a reflection of anyone’s character, save my own.
Very interesting artifacts. Almost looks like Navajo Art.
I’m wondering if it is the thermal relief algorithms interfering with each other from the through holes. Might want to try by changing the connection to copper zones in the “local Clearance and Settings” tab of the pad properties in the footprint editor. I’m thinking changing the setting from the default “From parent footprint” to either “Solid” or “None”. Because of the number of pads and the fact that at each point there are 3 pads overlapping, it might be faster to select and change one of the THT holes and save. Then open the footprint file in a text editor and copy the attribute setting from the one THT pad to all the other THT pads using clipboard cut and paste. Then reload the footprint into the board file.
Great. Glad to help. Just out of curiosity, what fill setting did you use, and would you provide a screen shot of it in use? Thanx.
You may want to make several footprints all with slightly different drill hole sizes. Have a very small board made with one each of the sized footprints and use that to test fit to make sure you specify the right drill diameter for your full project (and any future projects that use this part).
This assumes that the drill has the same tolerance in your next order.
It might make sense to contact the manufacturer about that and talk to them regarding tolerances. (you might need to specify tighter tolerances for these holes depending on the part that will be pressed into the pcb.)
@sg.giffin I also forgot to mention that different manufacturers (and even different processes from the same manufacturer, e.g. prototype vs production) may have different tolerances and THT wall build-ups. Rene has the better idea of first contacting your board vendor with the part datasheet on hand. If you are lucky, you might be able to get them to throw your test board “coupon” into an unused area of another customer’s panel and provide you the coupons for next to (or actually) nothing plus shipping.
Not that I know of. That is why you need to contact the PCB vendor that you plan on using. I don’t know much about THT wall thickness other than it is a measurable, and to some point a controllable, property of the boards. For all I know, the wall thickness specified in the part’s datasheet is close to what PCB vendors do nominally. Or, it could be a completely custom thickness that requires tight communication with the vendor.
The current practice is to specify the FINISHED hole size on your drawings (footprints, Gerbers, drill files, etc). A vendor who asks you for the drill size before plating is 20 years (or more) behind the times. I discussed this in old posts at, e.g., " Drill Hole Sizes " and " PCB Designing for 6 Layer ".
When specifying a hole pattern for press-fit, remember that there are several tolerance factors at work. Of course there is the tolerance on the hole diameter itself. For quick-turn, prototype, and short-run boards this reflects not only a basic, fundamental, machining tolerance but also a tolerance based on how your requested hole size (e.g., 0.0625") gets mapped into the sizes available from the vendor’s “standard tool rack” (where the closest sizes may be 0.060" and 0.067"). And there is also a tolerance on the position of the hole center. The most comprehensive document dealing with these factors is SEEED Studio’s " PCB Design for Manufacturing " manual (paper copy at " SEEED Design Guidlines ").
As others have said, you need to contact the PCB fabricator if your tolerance requirements are tighter than the vendor’s published values.
