ERC errors. Help with placing power jack needed

Lookout. I am another Newbie thinking I will learn electronics!

I thought i would try electronics and have started with a simple 386 mono AMP. It breadboards well enough but I am having issues with the ERC saying that the power pins of the IC are not driven by any power pins. I have read other posts and see they used flags. I can’t see why i have errors?

How do I make a jst power jack for the input of power onto the PCB and create power nets properly?

Appreciated.

A “Do not add connection mark” must be inserted at J3.
Keine Verbindung Markierung hinzufügen
U1 needs to be aligned.

There’s a FAQ about the PWR_FLAG here: ErrType(3): Pin connected to some others pins but no pin to drive it

It’s worth reading to understand the reason behind the ERC message and how to deal with similar situations.

There are a few solutions you can use:

  • Ignore the warning
  • Put PWR_FLAGs on the power lines
  • Make a modified copy of the power jack where the power lines are of electrical type Power Output

Addendum: That FAQ is a bit dated and the exact messages have changed. Somebody more keen than I am should write an updated FAQ.

C2 & C7 are not connected correctly.
If you see a small, green, unfilled box on your drawing, there is a problem with the wire connection.

You probably don’t need to make a JST power jack. There is a library of JST footprints. Choose the correct one and then associate it with a symbol.
You first need a power input symbol on your schematic.
You then need to right click that symbol, select properties, click on “value” on the Footprint Field.
If there is a footprint described, click on the three books at the RH end of the value and see if that is the footprint you require. If it is not the correct footprint, use the library list, on the same page, to navigate to a suitable footprint. Start with the “Connector_JST” librsary.
When you find the correct footprint via this window, double left click and that footprint will now be associated with your symbol.

A net is a wire that connects two or more pins.
The ERC is not very smart. It does not know power can run through symbols (any symbols), so each net in the powerline needs a power flag.

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Thanks very much. That did good.

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And C3 is shorted out, which is probably not what you intended, since it has no effect at all this way.

Yes ekoek,

Well spotted. I did notice that and wondered why. Both the legs of C3 at 0 volt. Not much is going to happen there.

I got the original schematic from https://www.circuitbasics.com/wp-content/uploads/2015/04/Build-a-Great-Sounding-Audio-Amplifier-with-Bass-Boost-from-the-LM386-Amplifier-With-Gain-Schematic.png

Have I interpreted that 470 pF cap (C6 in this schematic) incorrectly? It seems to be shorted to me too on the original.

Reading about the circuit it states that this capacitor is filtering radio noise.

Connected that way it filters nothing.
See C1 at Figure 9-13 in https://www.ti.com/lit/gpn/lm386
But that has nothing to KiCad so should not be discussed here.

It says: " 1. A 470 pF capacitor between the positive input signal and ground, which filters radio interference picked up by the audio input wires." Sounds to me like they got the circuit wrong, it should be between pin 3 (The POSITIVE input) and ground.

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