No, I meant the DRC dialog, and was talking about “isolated copper fill” warning, not “missing connections”. But certainly, ignoring “missing connections” means begging for trouble if it was a permanent choice and not just some test.
These errors have nothing to do with my problem
There are two issues here: bad translation, which caused me to say “ignore” the error resulting from placing a wire connection between two points on the board, which resulted in the error of lack of connection between the ground areas (I provided appropriate screenshots)
Second thing: drc reported a connection error (see above) but only for the top layer. The lower one was ignored.
You say it’s because there are islands there, and when there are islands, drc assumes that’s how I’m supposed to be. I know how to remove them, but it doesn’t matter, what matters is that due to the too close position of one of the vias, the continuity of the ground area was interrupted and, as a result, a break was created in the circuit - and this was not reported by DRC.
This is my complaint, nothing more.
BTW If I don’t reply, it’s not because I “ignore” help, I’m just going to sleep or at work where I don’t use Kicad - a little more peace, please.
Another issue is translating my problems into English - it’s not easy 
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You are doing a good job, thank you for making the effort 
We appreciate your patience, and I admit that it sometimes happens that when an original poster is silent for a while the discussion heats up when the others speculate.
Your manga is comprehensible, but it only seems to affirm what I have been saying. It also doesn’t actually represent the situation because it doesn’t have pads which define zone connections.
This thread has continued for so long that it may be very difficult to read it again trying to distill the relevant information. Because in my opinion I have already adequately told why you have arrived to this problem, I don’t see explaining the same things again in another way very useful. I also can’t be sure if I’m correct because it would require actually playing with the project.
If you want to continue but don’t want to attach the project here, you can also send it to me in a Personal Message (PM). I’m a janitor in the bug database and have access to confidential reports anyway.
If my speculation this far has been correct, I could show and explain step by step what has happened and why, and show how it can be fixed without changing the functional layout. And I mean: so that you would see a relevant error message in the DRC. You thought there is a bug but I believe you just got what you asked KiCad to do.
OK, thank’s for your time - I send you my project and you will check what was the reason for my problems.
Unfortunately, I’m at work so I can do it when I get home (in about 3 hours).
I am surprised by this behavior of DRC.
There is also the issue of translation, but as I have already checked, I don’t know if it is even possible to make a correction - because believe me, the current one is incorrect.
DRC does only report missing connections. The layer it tells you is often not that helpful, it just lists two random things in both parts that aren’t connected.
Both disconnected parts have vias/pads to the top layer. So KiCad doesn’t know if you want to do the connection on the top or on the bottom layer.
If drc does not distinguish the sides of the board, you are right.
But that means I had a wrong idea of how it works.
For me, the drc algorithm on a printed circuit board should be strictly related to its sides, because a given track can be on two sides and have a break only on one, and the purpose of drc is to show where this break is (that is, de facto indicate the side of the board and not a random page , because it does not make sense).
It would be great if @Piotr could give another opinion on the translation, just for confirmation.
Where is he when we need him 
@RaptorUK has a surname as bad as mine, I believe, but I expect his opinion on the translation in as useless as mine. 
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There is 8.0.1 in title while I am still in 7.0.11 so I didn’t even opened this thread.
I am starting to read from beginning to find what is expected from me
Politely asked for, certainly, not expected.
I was always very slow in reading (but very accurate). Once I was siting on the back sit in car next to 9 years old boy who was reading Jules Verne’s Mysterious Island. Trying to read together with him I had to give up noticing that I am reading 6 times slower then he.
Could you write what I shell read.
In first post photo I see vias at both zone parts in question so I can assume they are connected to GND fill at bottom so the whole problem may be is not existing.
Only in post 6#. The text in the screenshots.
I agree that translation is wrong.
‘Missing connection’ was translated into ‘wrong connection’ (whatever it could mean).
As EeliK mentions, the sixth post from the top.
The lower circled item is in English. The upper comment is supposed to be the Polish translation.
Would you comment on the accuacy of the translation, and, if incorrect, would you comment on what should be written in Polish, please.
Would you suggest the correct translation please?
This needs to be reported as a bug.
“Brak połączenia pomiędzy elementami:”
I bolded the letter to be changed together with first word be changed.
‘Brak połączenia’ directly means ‘Lack of connection’.
Directly translating ‘Missing connection’ would be ‘Brakujące połączenie’ but sounds worse for me.
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Just change it in Weblate
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Reading the thread…
It is not important but what Tomasz wrote (post 6):
is closer translation from Polish ‘Nieprawidłowe’ than my ‘wrong connection’.