Hi,
I know I can set Cu layers DRC by netclass.
Is it possible to define DRC by layer? Sometimes manufacturers have different DRC for inner and for outer layers…
Any help will be appreciated!
Matan
Others may know better, but I do not believe this is possible at the moment. I have a board with a 0.8mm BGA requiring differential escape routing with different DRC rules within the BGA footprint than outside of it per the PCB house process. I had to bounce the nets between two classes. It would be nice to setup DRC per region or layer.
Off to look if there is a feature request posted for this…
2 Likes
There is a plan to refactor the DRC system in KiCad for V6. Here is one of the wishlist bug reports: https://bugs.launchpad.net/kicad/+bug/1772518
And here is a draft document describing the ideas for the new system: https://docs.google.com/document/d/1qvCH9aHwCzp5qtKTna4jJXuloNU0b96gAxAHSKPuXpU/edit
I also really need the ability to set design rules per layer and area on the board. A typical thing when doing high power, high speed, rf or BGA designs. 
2 Likes
Thanks for the follow up on this feature. I added myself to the bug affectivity and checked out the document. Good to see this being worked on.