I would like to create a drawing that shows components and their silk screen designators for hand assembly.
I need to make something similar to Altium’s Draftsman drawing for our assembly technician to hand-build these boards. In the past (using a brand-X PCB layout program) I have done this with a mechanical CAD program by importing a DXF of the silk screen, footprints, holes, and board outline and manually annotating the drawing.
That’s what the FAB layer gives you. More info than silk. If I am hand assembling I will print the fab layer and then get some colored pencils – mark the larger-quantity parts – eg: 0.1uF as blue, 10k as yelllow…
Of course your library parts need to have the fields defined and placed on the FAB layer appropriately. I have a hand-crafted library that suits my workflow and I have a database and various extra fields that help. The SILK layer will only have the Reference Designator (0.64mm high/wide and 0.15mm thick).
The FAB layer will have ${REFERENCE}${FabExtRef} (0.5mm high/wide and 0.1mm thick) which concatenates two fields – the FabExtRef is defined in my database for extra info, such as resistor markings on 0603 and larger resistors. I tuck the Value field in the center of the Fab layer part when I can.
I also add an extra ExtValue field for schematic symbols, that is defined in the database for parts that benefit from a bit more info than I want in the Value field:
But it is so cheap to have jlcpcb assemble the bulk of the parts now I usually get much of it assembled there and just hand-solder a few special chips, connectors, and such.
Thanks! I’ll try that. We are forced to use US board houses, so off shore is not an option. We also have access to a pick-and-place machine, but that’s another mountain to climb.
I do my own assembly, largely because I design my boards largely around a lot of parts that I have.
BUT your statement raises a key question:
I find it helpful (or sometimes necessary) to solder ICs before soldering larger components. I think this is a common practice. The more obvious (??) reason is that the bigger parts get in the way of soldering low profile fine pitch ICs with a soldering iron.
But there is another reason: In order to confirm that the ICs (at least the fine pitch or otherwise more difficult ones) are properly soldered, I check all of the pins using the diode check function of a digital multimeter. With the POSITIVE DMM lead to ground, the diode check function should give a forward voltage reading of the ESD protection diodes which are normally at every IC pin.
I actually try to touch the probe to some other physical point on the tracks so I am measuring through a connection between the pcb and the IC pin.
A reasonable diode Vf number indicates that it is connected. If two adjacent IC pins indicate the same voltage, then I check from one pin to the other to make sure they are not shorted.
This practice has consistently served me well. I guess a cold solder joint is still a risk but it is a greatly reduced risk.
If many other parts are already on the board, then that seems likely to interfere with the DMM readings.
That’s a good tip Bob. With the positive meter lead on ground, you are checking the lower (negative clamp) diode. That is always there on inputs afaik, and I had not really considered it for outputs – though I see it shown in LV-A lit as having a parasitic diode on outputs. I recall something about that from semi processing class but that was many decades ago and I have been on the outside of the pins ever since
These are inputs for LV-A and LVC which are 5V-tolerant with a 3.3V vcc. This is typical also of pins on micros that are 5V-tolerant – just the lower clamp diode:
Then there are non-5V-tolerant pins on micros that also have an upper clamp diode, and the good-old HC family:
I recall many years ago I had a board of HC stuff I thought was powered down but it still had a couple of volts on the vcc bus. I finally realized that a high-level (from a powered external device) connected to an input pin on the un-powered board, and that input pin’s upper protection diode fed voltage to the vcc bus. A smack-the-forehead moment.
In our documentation I use pictures as I showed in this post (you have to scroll a bit):
Before making my first KiCad PCB I have done my libraries. Before making libraries my first worry was how to make such pictures. Those time (KiCad 4.0.7) I found the only way by having references and values at courtyard layers then exporting copper and courtyard (both with edge.cut layer) as svg and using inkscape opening copper and making it being gray and then adding courtyard to it (fixing by edge.cut). So I knew how to make my symbols - they have references and values at courtyard layer. In V5 I think I was able to get such picture directly from KiCad for top but not for bottom and to get it I had to change colors to gray scale so then I have a problem to get with them back so I still used inkscape. In V7 (or may be in V6) color schemes were added and probably you can get such pictures directly from KiCad, but I didn’t tried.