please read again Tom’s assumption/request about the collision with a non-zero thickness arc
Have you tested the footprint? It behaves as if non zero thickness arcs are already part of the DRC code. (At least if they are part of a custom pad.)
If you add it in pcb_new it is surounded by a line indicating the pad clearance like all other pads. This line looks like it does indeed take the thickness of the arc into account)
You can not get a trace inside that area without allowing drc violations in the router. (And if you do that, drc complains when you run it manually.)
This is not true in what I’ve tested (the track I routed passed inside the prohibited area), but running a DRC the violation is detected… so it seems partially implemented
If this will be completed, arc tracks would be the next step I hope…
You will need to set the pads’ net for it to pass DRC. You can either add it as a footprint to a single pin connector in EESchema or edit the pad in PCBNew and assign the net. Since there are two pads in this footprint, you’ll need to do it for both.
done it… still I can route through the prohibited zone… but as I said the DRC check is not failing giving a warning arrow
Might be a good idea to make a bug report. Assuming you are currently running the latest version.
With my setup i really can not replicate your behavior so maybe this has something to do with your project setup.
@Joan_Sparky it might be a good idea to split this particular part of the discussion into a separate topic as we are quite off topic to the original stuff.
Hm i can replicate something similar with your project. It is not easy but it seems sometimes when there is a direction change at the point where the trace enters the restricted area, it is possible to get walk around to enter the restricted area.
I could not get this problem without such a direction change at the border. (So i could not replicate your exact behavior)
Here a few screenshots from my tests.
First one shows that in general walk around works but it has some bugs. (See the entering of the restricted area in the last segment)
Trying to replicate what you saw (light red is the part that i “locked”) Note that the cursor is to the left of the pad but kicad does refuse to draw a trace.
Now when i allow kicad to make a direction change at the border it again violates the pad clearance.
Interesting, in my slightly older v5, it is somewhat bi-polar…
most of the time, it correctly follows the clearance, but rarely, it can ‘penetrate the barrier’ to give the trace inside boundary.
It seems to not quite cover all entry tangents ?
If you move the cursor slowly just inside the boundary, sometimes the trace will snake inside, but mostly it stays in the right place.
The more coarse/distant quick routing seems to be mostly ok, and it will sometimes correct a bad segment choice, as more segments auto-add.
@maui- Thanks for the example. Looks like we may be using the segment clearance rather than the larger of the segment and pad clearance. I’ll make a note to look at this tomorrow (unless you have time to put in a bug report 
Just a quick follow up on this. My initial guess was incorrect. You can route inside any forbidden zone if you are careful to get the second segment of a 45° track. Not specific to this footprint or footprint type. But good to fix nonetheless.
3 Likes
I promised to answer you later. Here it is:
- I have explained (I think) why I define my own footprints and than added: “I also don’t like the symbol library so I have my own” but you answer as I have written that I don’t like footprint libraries. My footprints are very close (or the same) ac KiCad in the subject of copper. The difference is the use of other layers to allow me simple made printed documentation I dream about (based on some my experiments half year ago, not tested yet - soon).
- Word ‘like’ was the simplest I just could think about to say. The better would be to say “I have reasons to not use KiCad symbol libraries”.
- In meantime I saw here at forum a short discussion about one sheet/hierarchical schematic. I’m new to KiCad forum, but suppose such discussions are never ending story. Don’t wont to start it again I will just say that I prefer to see everything at once so I use only one sheet schematics (one exception was long time ago - 1993). I accept that other have different preferences/needs.
- I found it being very, very useful to have all my schematics at hand. So every new project I print the schematic, make two holes in it and add to schematic set laying always on my desk. Then when I design something like 4 years ago I can very fast find what decisions I have made those times (what DCDC IC I have used, what inductor, what resistors to set 3V3 and working frequency and so on). It is much easier/faster for me than to find the right file on disc. Specially if new design contains parts taken from several others. Also when I’ve got a call from production/repair that they have a problem with something with device I have designed 10 years ago I see the right schematic in some seconds time. Few years ago the set become to be too fat and I had to divide it into two sets (products/our tools, tests, and so on). If I would use hierarchic schematics I don’t know how I would be able to organize them to have all at hand and looking through them would be harder. Now I fast look through them reading only product symbols and I know if there can be what I am looking for or not. If not - next sheet. With hierarchic I wold have each time to skip through some sheets looking for the main sheet of next product.
- Because of 3 and 4 I prefer to have small symbols as it helps to contain all schematic at A4 sheet.
- I have made a demo schematic using my symbols and KiCad library symbols. It is a real piece of few our products - two pins that can be used as input and as output. In both cases I tried to make it as compact as possible. With my symbols I had to enlarge it a little to have a place for names and values. With KiCad library symbols I left it not finished as there always will be enough place. I have made the screenshot with part of sheet table to help you see how much sheet space is occupied (lost).
- There are symbols that practically can’t be smaller. But there are still rational reasons to use own and not standard. The example are microcontrollers (I have ATXmega in my mind). Each pin can have many functions (UART, SPI, I2C…). It is not practical to list them all. But as I know which functions we use and which not I can have symbol which lists all functions I can ever use. As till now I design 2 layer PCBs with bottom being uninterrupted GND the last stage of placement is many changes in what input/output circuits are connected to what microcontroller pins. Having the right symbol allows to do that without looking to its datasheet.
There are only 2 reasons I use my footprints:
- What I have written before - to be prepared for making printed documentation as I think (only think) I need and I can get only with my footprints (we can speak about it in future - I am not ready yet to reasonable discuss it). Simple change in KiCad functionality will cancel that reason. The first thing I will check in V5 when stable will be issued will be if that reason is still active. I believe till V5 I will have a small set of my footprints so changing them all would be reasonable to do.
- For example KiCad 0603 resistor follows exactly Vishay footprint (as I remember). When, an year ago, I sow it for the first time I said: I like it, I wont to have it as it has plenty space between his pads and I’ll be able to route two tracks there (till now with Protel I used one 0603 for R and C and never even got an idea that I can have different 0603 for them). As I design really on one layer (except GND) it is important for me. But I asked my contract manufacturer and they didn’t accepted that footprint as being out of resistor and production tolerances. They use resistors from different manufacturer and if you look through the set of resistor manufacturers you will find that their resistors have different pin sizes and following this different footprint definitions. They asked me to have a footprint being good for any 0603 resistor and I have no reason to act against them.
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