It is certainly a depreciated example, but more to how the standard library is structured instead of how the code is written. It used to be true, but the mechanism used to allow it to be true (the hidden pins automatically connected to the net that matches the pin name) cause more problems than it solved. For example, if you had two CMOS hex buffer chips (or quad NAND, or any other other discrete logic chip) and wanted to power one from the 5V rail and the other from the 3.3V rail, there would be no way to connect the hidden pin named “VDD” on one chip to the 5V rail and the other chip to the 3.3V rail.
Currently they all must be manually specified. The schematic (and symbol library) file structures (and presumably internal data models) are undergoing significant changes for v6. I also know that the devs are aware of this issue for pin and unit swapping. I haven’t referenced the milestone list recently enough to know if the pin/unit swapping is targeted for v6 or pushed off to v7 at the moment. But tl;dr, the issue is known and will be resolved somehow at sometime in the future.