Board outline does not form a closed polygon (adjacent polygons)

Hello,

I want to use V-scoring to design detacheable PCBs, but in KiCad 5.5, when I check DRC, I always receive a “Board outline does not form a closed polygon” error no matter I do.

As a minimum example, I created a new empty project, started Pcbnew and draw the following two adjacent squares in the Edge.Cuts layer. No matter how I draw the adjacent squares, I always receive the above error. However, I’m absolutely sure that there is no error. The vertices of the squares fall in the 1 mm grid precisely, forming closed polygons. This can be verified by the edges coordinates and by zooming in the vertices.

Is this a KiCad bug? Is there a solution or workaround?

According to this post, in 5.1, the Edge.Cuts Layer must be individual line segments, not polygons. I’m not sure if that is still true, but you may want to read through that post and do some experimenting.

Sorry for not being clear, but the squares above have been drawn with line segments (“Add graphic lines”). And I have drawn them in different manners.

  1. I have drawn a rectangle and then, the middle line;
  2. I have drawn two squares, so that I ended with two superposed middle lines;
  3. I have drawn a square and an U, to not duplicate the middle line;
  4. I tried to also use the margin layer;

and more, all without success.

If it is OK until you add the middle line you may have to live with the error. I did a board awhile back and just checked it now to see what would happen. Same error. If you KNOW there is no error and, more importantly, your gerbers are correct then don’t spend too much time on it.

Yes, You’re right. The middle line causes the error. But, ignoring it is frustrating. The DRC is meant to help avoid errors, start to ignore such warnings can fool you and lead you to overlook a real and catastrophic error.

I believe the ability to ignore specific DRC errors is a feature being worked on.

The outline of the board is cut with a (non-zero width) milling cutter. You usually need to specify V scores on a different layer and communicate that to your fab. In your rectangle example, you would have a channel cut between the boards the widths of the milling cutter which is not what you want. The fab would probably flag this as an error.

2 Likes

Usually that layer is Edge.Cuts, and the convention is that interior edge to edge lines in that layer are V-cuts, not board outline. Wouldn’t hurt to ask the fab and also mention it in a note. Source: I have done this a couple of times after checking with the fabs.

Ocean Smile: https://www.cnospcb.com/support/what-are-the-v-cut-panelization-rules.html

JLCPCB: V-cut and rounded corners (an old thread I started)

Here’s one I did of panelised breakout boards. The 3D viewer complained but still rendered the board, minus the V-cuts.

Incidentally it’s not true that you have to consult them about the size for “alignment” or “wastage” reasons. They don’t have any restriction on what size you create within the 100x100 mm envelope (which comes from an old Eagle restriction for free use) for cheap boards (or larger boards, if you pay more). They may however slap you with an “engineering charge”, which is to compensate for the extra effort to run the boards through the V-cut machine. I got charged a bit more for the example above for the 7 V-cuts, but the board was a freebie anyway.

Panelisation works at two levels. At the fab level they have engineers or technicians solving the 2D knapsack problem every day packing boards of different sizes and aspect ratios on their large panels. To fill the “wasted space”, they offer cheap PCB fabrication under 100x100 mm in quantities of 5 or 10. Your design is photographically combined with those more important orders in a exposure mask. So your 5 or 10 boards are actually coming from 5 or 10 distinct large panels. Cheapskates like me then try to squeeze in more tiny boards by doing our own panelisation. The fabs tolerate this to some extent if it doesn’t cost much more, until they decide you should pay a bit more.

This is also why your small board may be delayed a little bit until they can fit you in. For high volume fabs the wait will be shorter.

1 Like

The gerber format is a standard, but there’s no one standard interpretation for many use cases. Therefore you always should find the recommendations of your manufacturer or ask them if unsure. V-scores are often marked in an extra layer (see @John_Pateman above) but may be also in Edge.Cuts (see @kenyapcomau above).

3 Likes

To back up what I have written, here are a couple of paragraphs from a process description from a manufacturer which I have anonymised so as not to advertise for them. Emphasised text by me.

Do not assume any particular semantics for interior Edge.Cuts lines. You can however sure that they will not mill it into > 1 board for you (why would they let you combine designs that way?). The use of interior Edge.Cuts lines to indicate V-cuts (grooves/scores) is not a standard. But many fabs use this convention. Always check. And there may be extra charges.

1 Like

This topic was automatically closed 90 days after the last reply. New replies are no longer allowed.