Ok, that clarifies it and I understand now.
It is an interesting workaround as an intermediate step in reverse-engineering.
A better / real solution that I hope is going to be implemented at some future time, is to draw tracks in the PCB editor, port the netlist to the schematic, and then draw ratsnest lines between schematic symbols. But at the moment, neither is implemented.
On a sidenote, are you aware you can use PCB Editor / Place / Add Image to add a background image for reverse-engineering purposes?
