Hello!
I have the following problem: I’m designing a board with analog and digital parts. I have chosen the symbols 3.3VA and 3.3VD for that, but Kicad mixes them. They are all linked on the board. I have tried to check the wires on the schematic, but there is no infot about the nets. Why do these nets merge?
Any hint?
Same question for the grounds, by the way. There is a ratsnet between GNDA and GNDD. How can I
keep them separated?
R
Did you by any chance derive those symbols by renaming a copy of a single symbol? You have to also rename the single pin inside the symbol otherwise they are all copies of the original symbol and thus connected.
PS: As for how I discovered this the hard way: I had a design using 5V but also had a regulator to generate 3V3. I saw that the IC could run at 3V3 as well as 5V. So I decided to edit the 5V symbol at the IC pin instead of fetching a 3V3 symbol from the library. Next thing I knew, the two rails were shorted. I realised what had happened by examining the net names. Fortunately this was before the design was realised.
Store them as separate items in a personal library, then use those symbols on the schematic.
Piotr’s answer is better. The neet name is derived from the hidden pin in the symbol, and not from the value of the symbol.
Then there is also a strange thing where +3V3 and +3.3V map to the same net.
It has also canged in the nightly, so expect it to work differently in KiCad V8.
This means that there were these symbols in library and you just used them.
If it is true than library you use has a bug.
But I suppose what you write it is not true and you modified one symbol modifying only its name and not net it is connected to.
You’re clairvoyant? You know what I will write before I write it?
Oops, now I see my mistake, The first post was by retiredefline.
She mentioned you have to modify the pin name. Storing your symbols in some external library as jmk suggest does exactly nothing for the net connection problem.
Hello!
Thanks, it solved the problem.
R.
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