Ok, I think I understand, but am I not correct in thinking that one
would need both, the schematic and footprint to be able to use it in
I’m afraid I don’t know enough about schematic symbols and footprint
to generate one myself yet.
So the alternative I thought of is just use a dil32 socket instead of
So to test out if I could get this to work in SKiDL, I modified the following:-
from skidl import *
gnd = Net(‘GND’) # Ground reference.
vin = Net(‘VI’) # Input voltage to the divider.
vout = Net(‘VO’) # Output voltage from the divider.
resistor = Part(‘device’, ‘R’, TEMPLATE) # Resistor template
dil32 = Part(‘conn.lib’, ‘dil32’, TEMPLATE) # Dil32 template
r1 = resistor(1)
r2 = resistor(1)
d1 = dil32(1)
r1.value, r1.footprint = ‘1K’, ‘Resistors_SMD:R_0805’ # Set resistor values
r2.value, r2.footprint = ‘500’, ‘Resistors_SMD:R_0805’ # Set resistor values
r1 += vin # Connect the input to the first resistor.
r2 += gnd # Connect the second resistor to ground.
vout += r1, r2 # Output comes from the connection of the two resistors.
d1 += r1 # connect the input pin of r1 to pin 1 of IC socket
d1 += r2 # connect the GND pin of r2 to pin 2 of IC socket
d1 += vout \ connect vout to pin 3 of IC socket
+= NC \ mark remaining pins on IC socket Not Used
ERC() # Look for rule violations.
generate_netlist() # Generate netlist file.
The error I get is that I haven’t specified the footprint for dil32,
from where can I get this information?
NOTE; I am blind and I can’t access this information using KiCad. I’ve
tried looking in the KiCad directory in the modules folder and can’t
find anything to do with dil32. I did find conn.lib but that appears
gibberish in a text editor.