That’s exactly what highlighting does, it highlights all pads and traces of one net. In the default canvas the net which you are working on is always highlighted when in routing mode. You use the modern canvas, right?
No I don’t at the moment. But I’m sure every one have their own reason for this use case due to the physic of the board fab. not having issue with this. Your example about customize “maskless” is again, having the copper under it. Therefore silkscreen should not be on it.
I would think there is two ways:
4.0.7 way - make PAD as another layer/thing that independent to any other layer. (The way they draw it hard to see that distinguish - but if you try, you will see what I mean by independent to any other layer)
If PAD is not a special in it own. Then at least for silkscreen work, there should be the way to have KiCad turn off copper layer, mask layer. AND turn on the special layer that is the product of logic AND between copper and mask layer.
Otherwise, I would say we are remove the potential use case for silkscreen on the maksless and copperless areas.
Also - on the designer perspective, most often the mask layer is the last thing (or not ever need to think about) in the work flow. So this why the first thing when they work on the silkscreen is thinking about turn off copper layer (in the head). They rarely think about turn off copper, and turn on the mask! I had use Mentor Graphic, Altium CAD, or OrCAD - I did not experienced such this style.
Have you tried toggling different elements in the Items tab of the Layers Manager? You can turn off the rendering of traces separate from pads. You can even toggle rendering of front pads, back pads, and THT pads all independently. You can even change the rendering color of different elements by double clicking on the color tile (just like in the Layers tab of the Layers Manager).
(Screenshot from Windows 5.0.2_1)
I admit, I haven’t played around with this much, so I don’t know how persistent changes are.
I play with every feature in KiCad - including what you mentioned. But my issue is opposite is that there are no way you can only see elements like PAD without turn on copper layers or at least any layers associated with that PAD definition. If you play with 4.0.7 on this, you can see it is possible.
I no longer have 4.0.7, so I can’t. And no offence intended, but I just don’t have enough motivation to install 4.0.7 somewhere to verify what you are doing.
I was just pointing out how you may be able to get similar results with a different workflow. (Have the copper and silkscreen layers on of the side you are working on, and then turn off tracks in the Items tab.) I may have misunderstood your intent.
EDIT: but it could also be said: “If I switch Pads on and they are off it’s a bug”. That would be logical, too. The problem is in the Layers Manager which doesn’t reveal any visible logic or hierarchy in itself in the UI.
as genreally all my PCBs have no silkscreen (only if PCB is visible to the user I put there some text - terminal block pins description and nothing more).
My contract manufacturer never asked to have silkscreen so I understand that peak&place machine need not it. And someone who programs it (I have never seen how it is done) probably do it with paper printed doccumentation.
New contract manufacturer said recently that he would like to see pin1 markings on silkscreen so I consider to do it (but only it). I will do it in footprint definition and 0 work when designing PCB.
It seems to be not connected but only what disturbs me in doing it is that PCB Export to SVG don’t accepts flags to switch off value and designator and does have not its own flags to it what mekes me to use silkscreen layer to different purpose that it is intended.
Evil, bad manufacturer. It should be enough to have the fab layer which has better component outlines than the silk layer, pin 1 marks and references (if the footprints are made well).
Our practic (since always) is to give printed doccumentation with two pictures (using KiCad vocabulary):
black CrtYd, black references (as inside CrtYd as possible), gray copper,
black CrtYd, black values (as inside CrtYd as possible), gray copper,
We never give fab layer, but our CrtYd has pin1 marks and cattode marks.
Now I am preparing myself to use KiCad. As now I can’t switch on/off references and values in export, and it looks it will be the same in 5.1 I decided to have the same picture at CrtYd and at Silks but one with reference and one with value.
This new, smaller manufacturer just said it would help him to verify placements (I think with first pcb) if pin1 will be marked at silk. But in our pictures we mark it with line, which sometimes crooses the pad and he told that not all PCB manufacturers masks it. So I will think how to reconcile picture need and silk need.
If I had these flags working I would use only CrtYd for pictures and need not silk for it.
At September I hoped I will have these flags before I start to use KiCad.
I am not so sure you use the courtyard area as it is intended. That one really is not meant for documentation purposes but for DRC to check if two parts are too close to each other (And yes this is a new feature in v5)
For documentation purposes there are the fab layers. (you can also use some of the others but they are much more limited as they don’t come with front and back side versions.)
I’m wondering how you’re going to get this done in a professional environment?
The printer driver does support B/W or color printing of selected layers only.
To get gray copper + black layer info you need to print in color and set up the pcbnew colors how they should appear for the print. This naturally screws up your layout-ing process, as we humans differentiate a lot via colors. I guess you could run a separate KiCAD install just for that purpose or keep a pcbnew color profile and swap it during restarts of the program like I did in the past (it’s in the KiCAD settings folder) just for creating the prints… but’s it’s cumbersome.
Yeah, would be nice if some professional entity who has a desperate need for a wishlist-feature like this could sponsor it, I can only afford like 2 hours of a programmer at CERN as far as found out 2 weeks ago