While this is a completely unhelpful statement it is also completely false. There is absolutely nothing strange about the stackup dimensions he posted and they are certainly far more realistic than 0.5/0.5/0.5mm. There are many different combinations of pre-preg used in stackups depending on the desired board specifications. The example you posted would not be an ideal stackup.
A quote from ICD AN2011_2:
To improve the EMC performance of a four layer board, it is best to space the signal
layers as close to the planes as possible (< 10 MIL), and use a large core (~ 40 MIL)
between the power and ground plane keeping the overall thickness of the substrate to ~
62 MIL. The close trace to plane coupling will decrease the crosstalk between traces and
allow us to maintain the impedance at an acceptable value.
To return to the topic, changing the inner spacing to something like 0.2/1.2/0.2mm or even 0.3/1.0/0.3mm would be more realistic but it remains to be seen if it would change the 3D rendering at all. But I assume the 3D spacing is derived simply from 1.6mm / (number of layers - 1) so using sensible values for more than 4 layers would require a slightly better algorithm.