PCB designing for 6 layer

  1. ok also you have added eco1.user label %R what is that for ?
  2. if i understand correctly %R must be used only for the Fab layer not for the silks screen text/label correct ?

When I do layouts I switch off:

  • silkscreen
  • references
  • values
    As I still need to know what is what in tiny unobtrusive letters, but that also sticks out visually I use the Eco1 layer for references:

left - fab layer references/values visible, right - switched off, devices are 0805 mostly
text size for fab stuff is 0.6x0.6x0.1… imagine this with 1x1x0.15 and silkscreen references!

Using REF** on fab layer allows me to switch off the reference/value text while still being able to see the fab outlines of the devices for placement.

The difference between REF** and %R is, that REF** is switched visible/invisible by the Reference option in the render tab and for the %R it depends on the layer it’s on, like Eco1 or F.Silk for example.

  1. so this %R on the eco1.user and on the silk screen will be copied from the schematics am i correct? because i got to redo for nearly around 400 components :frowning: so want to be careful from the beginning
1 Like

Yes.

%R and REF** read the reference fields from the schematic.
%V or VAL** do the same for the values.

Just in case, copy your project folder (backup) before you import new/changed devices to your layout - when stuff goes wrong.

hi joan

i have done few footprint for few components

https://drive.google.com/open?id=0B1rwVwGpi1IbZUE4NlV1ZGJpOUk

can you please review and let me know your review comments
in the above link there is an excel sheet which has links to the datasheet and its relevant footprint file

  1. And for any minor cosmetic changes which would not impact my PCB design or fabrication you can ignore such review comments.
    2.if you put a review comment then that means it was a error in the footprint drawing and can have a significant impact on PCB design or fabrication process.

your review must be in 2 sections

Error/bug: All major errors in the footprint put under this section along with footprint file name
Cosmetic changes: you may ignore this section but just in case you want to add some info.

Regards
Nick

hello Joan

this one looks bit confusing can you please help with its footprint

datasheet and footprint both attached to this message

the data sheet say the cathode is horizontal :confused:

LED-0603.kicad_mod (1.7 KB)

It looks like a basic 0603 footprint to me, similar to a resistor or capacitor with the same dimensions. Have I missed something?

There are several places where the silkscreen contacts a pad, or may contact a pad due to alignment tolerances in the board fabrication process. Some board houses will simply remove the offending silkscreen. Others will remove silkscreen from all areas that don’t have soldermask, whether it is exposed copper or just bare FR4 substrate. Some will put your job on “Hold” until you correct the situation or approve their suggested action.

Of course, silkscreen that covers part of a pad will probably interfere with proper soldering. There is no debate about that. However, there IS active debate about about silkscreen (as well as traces) that falls between the pads of SMT components. Your diode symbol is an example. Some manufacturing engineers claim the cured silkscreen (or copper trace) is thick enough that it can lift the SMT component, prevent the SMT endcap metallization from touching the pad it is intended to contact, and create a bad solder joint. Others claim there is more than enough solder paste placed on SMT pads to fill the gap and create an acceptable solder joint.

This is less likely to be a problem with packages (such as an SMB diode package) where the electrical contact is created by bending a metal lead frame over the end of the component package. In those cases, the actual component body sits above the plane of the electrical contacts by 0.05 mm or so, creating a gap between the board and the component body where you can safely place silkscreen (or a trace).

Dale

dear kicad

can some one pleases make a footprint of the following component this is the SD card Slim type with switch

Regards

can some one please review this footprint

RJ45_TRANSFO.kicad_mod (3.1 KB)

datasheet is in the bellow link
http://www.farnell.com/datasheets/79319.pdf

except the hole size which is 1.016 in my case where the datasheet says 0.89 any other review you can let me know

regards

Dear Kicad

please ignore the previous message of making footprint i shall make it as i can be extra cautious may be i can post the footprint so that some one can review.

also i noticed that many footprints default present in kicad library 9 out of 10 are having incorrect footprint so my suggestion please check all the footprints before sending it to assembly house.

in fact i just had trusted many footprints from kicad library and was about to go with fabrication but Joan_Sparky , nicholas & keruseykaryu and few others helped out thanks a ton to them.:relieved:

Regards

OK, here’s what I’m seeing at first glance:

  • “Hole” holes should probably be NPTH ([e]dit>Pad type)
  • “Hole” holes are 3.302mm, datasheet specs up tp 3.25mm.
  • I usually like footprint origin to be centered for the part, SMT and TH (sometimes we use TH reflow or paste in hole processes here).
  • The datasheet specs a 1.57mm hole for the shield, yours are 1.778mm and may very well be fine.

thanks jwpartain1

what does " probably be NPTH ([e]dit>Pad type) " mean ?
apart from hole size do you think any thing else

Regards

He is suggesting that the pads labeled “Hole” in your footprint should NOT be “plated through”. He reminded you that this characteristic (“plated through” - PTH - versus “Not plated through” - NPTH) can be changed by editing the pad’s attributes.

  • To edit pad attributes, either:
    - Hover the mouse cursor over the pad and press the “e” key; or
    - Right-click on the pad and select “Properties” in the pop-up menu
    You specify NPTH in the “Pad type” selection box.

  • “Plated through” (PTH) means that an electrically conductive connection is created between top and bottom layers of the board by depositing metal on the interior wall of the drilled hole. The metallic cylinder created by this plating process is sometimes called a “barrel”, or (rarely) an “eyelet”. The plated hole also provides a more secure mechanical attachment than an unplated hole. I believe plated-through holes started to replace mechanical eyelets in high-reliability and high-complexity electronics in the 1960’s, but since the 1980’s just about all commercially fabricated boards with two or more circuit layers have used plated-through holes to mechanically mount, and electrically connect, electronic components in a circuit assembly.

  • A “Not Plated Through Hole” (NPTH) does NOT provide electrical conduction between circuit layers. The walls of the hole are left in their natural drilled state. Are commonly used for the board mounting holes and for places where components attach to the board without electrical connection. Sometimes a pad is placed around the top or bottom of a NPTH to create a bearing surface for the mounting hardware, even though there is no electrical connectivity through the hole itself.

Dale

2 Likes

thanks for the detailed explained yes its good to have NTPH pad type as it is just a mounting hole.

i just did not follow this point from jwpartian1 “I usually like footprint origin to be centered for the part, SMT and TH (sometimes we use TH reflow or paste in hole processes here).”

and also as he mentioned holes size are slightly bigger but i feel its ok any way as extra space would be filled with copper

I’m not sure if this applies to Kicad, though I would guess it does. When you generate a .pos file from Kicad (File>Fab Outputs>Footprint position), which is the placement of all parts with the Normal+Insert attribute, it spits out xy placements from the origin of the component to the user placed origin for drill/place files. If this footprint origin is not the center of the component, there is some offset involved which the manufacturer’s pick and place machine cannot account for (without additional manual input).

Parts with centered origins ensure correct automated placement.

thanks jwpartian1

now i get what you trying to say but this footprint is centered as per the land pattern in the datasheet or am i missing something ?
or is it that you want the pin1 pad to be at the origin

Depending on your manufacturing process, it won’t matter for this part. You could be hand placing/soldering or hand placing/wave solder in which case, who cares where the origin is, I just mean as a best practice, your parts should have origin at the center of the entire component, like “it’s sitting in a rectangular hole on a reel, what’s the center of that rectangle?” kind of origin.

thanks jwpartian

now after you explained me this point " your parts should have origin at the center of the entire component"

that is when i got the idea it will be easy for the assembly house to place components
i have modified the file and placed it at the center for me it was just a matter of moving entire component to X,Y location

now can you please check if it correct ?

RJ45_TRANSFO.kicad_mod (3.6 KB)

Probably not. The current practice for the large majority of board fabricators says that the hole size specified on the drawing (actually, in the Excellon drill file) is the target size for the finished board - AFTER plating and finishing the hole. So if your drawing calls for a 1.78mm hole, the board fabricator will work to deliver a 1.78mm hole.

If you place an order for thousands of boards to be used in high volume production the board fabricator is likely to use the tooling he needs for creating a finished hole of the size you specify. Quick-turn prototype jobs (up to several hundred boards) will be manufactured using your supplier’s “standard tool rack”, unless you pay for something else. The standard tool rack contains tooling that produces hole sizes which the board fabricator believes are the most common or most useful sizes. The board fabricators I have used can all produce at least a dozen different hole sizes with their standard tooling, and some can do 25 or 30 standard hole sizes. Unfortunately, no two fabricators can agree on exactly which hole sizes are “standard”.

If your drawing calls for a hole size that is NOT one of the standard sizes, a quick-turn prototype shop will handle it in one of four ways:

  1. He will INCREASE the hole size to the next LARGER size in his list of standard sizes. The boards you receive may have sloppy fits in all of the component holes, though it will hardly be noticeable for hand-assembly.

  2. He will DECREASE the hole size to the next SMALLER size in his list of standard sizes. (This is rare.) The boards you receive may have tight fits in all of the component holes, and some may require an extra push to get a pin or lead through the hole.

  3. He may round-off your hole size to the closest size in his standard list. Hopefully, you won’t notice the difference (especially if his standard tool rack has a good assortment of well-chosen sizes).

  4. He may put your job on “hold”, until you send drawings that call for only the sizes on his standard list. This may be philosophically the most correct approach but it is very unpopular due to delays while information flows back and forth.

Of course all hole sizes are subject to manufacturing tolerances, typically several mils (0.1mm) or so.

Many quick-turn vendors tell you on their web site how they handle this problem. Or you may have to ask. Or select a preferred fabricator, determine what his standard hole sizes are, and make sure your footprint library uses ONLY those sizes. (Yeah, that means we create, organize, and maintain our own local libraries.) If a board fabricator changes a hole size he may, but probably will not, send an email telling you that he is doing this.

Dale

1 Like

thanks pal

for a information on hole size it is better i stick to the datasheet hole size since i had taken it from the library hence assume it was almost correct size even i measured it

can some body please verify the bellow footprints

Pin_Header_Straight_1x06.kicad_mod (2.5 KB)
USB_A.kicad_mod (2.9 KB)

bellow is the datasheet for all 3 in sequence
http://www.cui.com/product/resource/pj-002a.pdf
http://datasheet.octopart.com/SSHS-123-D-02-GT-LF-Major-League-Electronics-datasheet-8326400.pdf
http://datasheet.octopart.com/87520-0010BLF-Areva-datasheet-13493241.pdf

Regards