LLM-Driven Tool for Catching PCB Schematic Errors

I’ve been working on a web app called Netlist.io that takes a KiCad (or Altium) netlist plus any relevant datasheets and lets an LLM reason about the actual circuit. The goal is to help catch schematic issues that the usual ERC checks don’t flag, and it can also help with debugging already-fabbed boards when you describe the failure symptoms.

I started building this after too many avoidable mistakes slipped into production, and I’m hoping it can help others avoid re-spins as well. I’m looking for early users who are willing to try it out and share feedback. Would love to hear what you think!

There are a few other projects using AI in KiCad, and apparently at least one of them works from within KiCad itself, so there is no need to export files first. Have you considered to contribute to those projects?

Hi! Before I started this project I did do some research into other solutions, I just wasn’t able to find anything that checked all the boxes for me. But If you know of anyone working on something similar I would definitely be interested in checking it out.