Incorrect mask processing (nearby mask cuttouts joined)

Edit by mod: this post confuses mask with silkscreen.

Hi,

I have a problem with the silkscreen gerber file created by pcbnew.

The silk screen merges between pads. A picture can be seen in


On the left is the original silk screen in purple as shown in pcbnew.

On the right ist the gerber output in green. See how the screen gets merged.

What am I doing wrong?

The project is in
https://www.igh.de/transfer/4c55053783644e5eee5d6eea2646f44b/ec-interface.zip

Thank you for the help!

It’s the mask layer. See Change File->Board Setup->Design Rules->Solder Mask/Paste->Solder mask minimum width. The BGA pads are so close to each other that you can’t put unmasked footprint pads between them. Remove the mask layer from the through hole pads.

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See also What is the meaning of the layers in pcb_new and in the footprint editor?.

You can also consider using vias between BGA pads, not footprints.

Excellent, thank you very much!

The free mask between pad and via (both 350um, BGA pitch 750um, Solder mask clearance 51um) turns out to be roughly 70um, so setting “Solder mask minimum width” to 50um did the trick.

Remember that the board manufacturer has limits for minimum mask width (“web” or “bridge”). 0.15mm should be pretty safe, 0.10mm isn’t rare but not everywhere, but 0.05mm may be too little. You shouldn’t expose copper between the BGA pads anyways (why would you want to?).

EDIT: the problem with too narrow mask is that it may be broken and peeled off, and the strips may go between pads and board copper when the board is assembled. Very nasty when you try to debug and fix a BGA.

Ganted, this is a poor design. I wanted to have a test point attached to a BGA pad. However, I only really needed a B.Mask, the T.Mask is not required (as it is under the BGA anyway) and in this case is even detrimental to the design, requiring 50um mask design rule.

Better would be to place a via with a B.Cu test point instead of the THT test point.

However, I had the same problems with the SO-6 on the left and this was a real issue.

See also How does solder mask layer work?.

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