Hi, I’m drawing a schematic with CMOS logic gates. When I click “Show Hidden Pins” I can see the V+ and Ground pins for the chip but I cant find any way of setting up decoupling capacitors. Does anyone have any pointers please?
You can generate a NET output to check how this works.
Doing this, I find
a) The names showing when you show hidden pins, are the net-names connected to. (eg VCC)
b) if you connect a wire to the no-longer-hidden pin, & rename the net, that over-rides the default symbol name.
eg a default of VCC can become +5V this way.
Connecting decoupling caps to either VCC or +5V (depending on a or b above) would decouple this part.
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Hidden power supply are one of my pet hates.
I normally draw my own multi unit symbols with a specific power unit, so that I can then draw a decoupling block
Using one of the cmos symbols, I would draw the capacitors as connected to V+ and GND nets and add text to explain which chip they are associated with
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I generated a netlist and inspected it and found that Pin 14 was connecting itself to the VDD net but pin 7 wanted to connect to VSS rather than GND. So I whacked in a couple of wires with a cap between them and labelled them VSS and VDD and connected VSS also to ground. I guess during board layout I’ll be able to move that cap so it is physically close to the IC. Thanks people!
How does the netlist cope with that ? Sounds a little like some net confusion will result ?
See my test above, where you can Enable Hidden Pin view, and then the symbol can connect wires to those pins.
(Zoom in and you can see the connect terminal, small but present)
That will over-rule the suggested hidden pin name, with the connected NET name.
I expect this is needed for every part, but not every gate symbol within each part.
@PCB_Wiz I may well try that. A lot more chips to include yet. The IC now integrates nicely into the GND net … no confusion. I did try to use show hidden but I didn’t zoom right in when I unsuccessfully tried to connect the pins.
Sometimes these hidden power pins are a nuisance, specifically if you have insulated grounds and powers. When I use one of the parts, I move it into my own lib and then give it visible power pins. (And change the appearance to fit with a ‘common look’ in my drawings)
It’s good enough to place the capacitors somewhere close to the IC they shall be connected to. When you start the layout editor, you get everything in a big pile and have to sort it out anyways. The ratsnest is little help with supply lines.
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Yeah, they are somewhat ‘visually hidden’, and I may have even been in the Footprint editor when I first noticed the terminal circles, and thought ‘Hey, maybe you can connect to these ?’
It’s quite a nice feature, being able to optionally connect to these usually hidden/supply pins.
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Hidden supply pins are a relic from the TTL board days, when the digital world was 5V and that was it.
These days its common to find 3 or more supplies on any complex IC
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